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[v1,0/2] Adding iommus property and setting max link speed for PCIe

Message ID 1714494711-10322-1-git-send-email-quic_msarkar@quicinc.com (mailing list archive)
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Series Adding iommus property and setting max link speed for PCIe | expand

Message

Mrinmay Sarkar April 30, 2024, 4:31 p.m. UTC 
This series adds 'iommus' DT property for PCIe RC nodes so that IOMMU
can be used for address translation.

and setting pcie max link speed to gen4 that was linited to gen3 ealier.

Dependency for Patch 2
----------------------

Depends on:
https://lore.kernel.org/all/1714492540-15419-1-git-send-email-quic_msarkar@quicinc.com/
https://lore.kernel.org/all/1714494089-7917-1-git-send-email-quic_msarkar@quicinc.com/

Mrinmay Sarkar (2):
  arm64: dts: qcom: sa8775p: Adding iommus property in pcie DT nodes
  arm64: dts: qcom: sa8775p: Set max link speed to gen4 for ep pcie

 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)