From patchwork Tue Oct 27 22:34:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 11862027 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5E2DA6A2 for ; Tue, 27 Oct 2020 22:34:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 35640221FB for ; Tue, 27 Oct 2020 22:34:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="Fo+amHC8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1832438AbgJ0WeS (ORCPT ); Tue, 27 Oct 2020 18:34:18 -0400 Received: from z5.mailgun.us ([104.130.96.5]:18288 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1832434AbgJ0WeS (ORCPT ); Tue, 27 Oct 2020 18:34:18 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1603838057; h=Content-Transfer-Encoding: MIME-Version: Message-Id: Date: Subject: Cc: To: From: Sender; bh=1pqcBR32icAlSSJqh7uaEgLiXLQO2q+LnzAnG1A6u8c=; b=Fo+amHC82D/gi8eLbmzDHqOrrFmmOq9acdRxY6BBCvcRJFliyxEA/edryHuET2jsyNEguyED 8xXHKf1RX6SqdTn5SQ1L/ntZY/9BZugIjnPI/mSAgzDm/ev7ZrCKIIo4gqZw5/nhtyzpNtDd 06HGdTaCH+6p8cgmLTcFIrrvmQ4= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-west-2.postgun.com with SMTP id 5f98a0691fc42e8c03490a3d (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 27 Oct 2020 22:34:17 GMT Sender: jcrouse=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id DD223C43395; Tue, 27 Oct 2020 22:34:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00,SPF_FAIL, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from jordan-laptop.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3B91EC433C9; Tue, 27 Oct 2020 22:34:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3B91EC433C9 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: linux-arm-msm@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Joerg Roedel , Krishna Reddy , Rob Clark , Rob Herring , Robin Murphy , Sai Prakash Ranjan , Sibi Sankar , Stephen Boyd , Vivek Gautam , Will Deacon , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v18 0/4] iommu/arm-smmu: Add adreno-smmu implementation and bindings Date: Tue, 27 Oct 2020 16:34:04 -0600 Message-Id: <20201027223408.469893-1-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This short series adds support for the adreno-smmu implementation of the arm-smmu driver and the device-tree bindings to turn on the implementation for the sm845 and sc7180 GPUs. These changes are the last ones needed to enable per-instance pagetables in the drm/msm driver. No deltas in this patchset since the last go-around for 5.10 [1]. [1] https://patchwork.freedesktop.org/series/81393/ Jordan Crouse (3): iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU Rob Clark (1): iommu/arm-smmu: Add a way for implementations to influence SCTLR .../devicetree/bindings/iommu/arm,smmu.yaml | 9 +- arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 9 + arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 3 + drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 157 +++++++++++++++++- drivers/iommu/arm/arm-smmu/arm-smmu.c | 3 + drivers/iommu/arm/arm-smmu/arm-smmu.h | 4 + 7 files changed, 182 insertions(+), 5 deletions(-)