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[213.36.7.13]) by smtp.gmail.com with ESMTPSA id m22-20020a7bcb96000000b003f17131952fsm2388519wmi.29.2023.04.19.07.41.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Apr 2023 07:41:56 -0700 (PDT) From: Arnaud Vrac Subject: [PATCH 00/11] drm/msm/dpu: tweaks for better hardware resources allocation Date: Wed, 19 Apr 2023 16:41:07 +0200 Message-Id: <20230419-dpu-tweaks-v1-0-d1bac46db075@freebox.fr> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAIT9P2QC/y3Nyw6CMBCF4Vchs3aSXqhSX8W4KHSUiaGSDgoJ4 d0pxuWfnC9nBaHMJHCtVsj0ZeF3KqFPFXR9SE9CjqXBKGNVrT3G8YPTTOEl6OqLs8qdjY4eCmi DELY5pK4/SKJlwr+zOMjQeN8cuzHTg5ff6e2+bTtH7Jp4hAAAAA== To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Arnaud Vrac X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2284; i=avrac@freebox.fr; h=from:subject:message-id; bh=NLA8aCokPucqX6VgfqosaRbjjOEPuDhGV/zebS121ow=; b=owEBbQKS/ZANAwAIAXED/9m7NDSrAcsmYgBkP/2Sx+NGYnUY5kQUzXMuJpNkUO1J4MQIjtMlw LyJMlg0K7mJAjMEAAEIAB0WIQSUwb/ndwkXHdZ/QQZxA//ZuzQ0qwUCZD/9kgAKCRBxA//ZuzQ0 q5HoD/9i3Ejx1LlCyQTcY4w5DlwreWOk6HnY4l/N3UMPC0w7x+mPamsZ/cVo9/uUtTy0c0GonyD j3iDZj6dvoTbozDGIZlfflLEORYJ7U7Rl8p7ILtlby7FDUc/tOzPTNj+umHN07JxMOvqtjpqSOE Eq1tdJ3x1pmrtE+PZhkNRZ3hA0RxDQIuya67zwFuo6ufl9cyB6S1rGKXbcIPuXpBAL62OkI0naF 6+tHvguoYSez/ttIBx+nUtvQ0Lc0MxoPrAN7V4jLUmCtuX9OpkenNjGyzHt21PcE4zS8MUr0wdR C7Cq46GHDJ55bRgmeHCYAPCmZpoq+8AQjtHF7M+jbaipQCOfFihatTvjNmpb72FZ0Av2/WWrIUV vdSQsQXvjDyZm4rVjZ8HTOSHpRM7VV/54RrHvRHQ8LeIgZCpJ2Um2iWgR3Gt3prM95TE81NMbgS Eg2TeA6FJbL/qRnOxub6KXJt2TwsGel6hWTQibC1TTFx9ca36nhkRerIoDbUJ+n0giEcO/+wwN5 HhT4nusm77Hz5vjB88rtS2ujUrqgBJjDQpy5Z2PZZ6wrvK3OvXxqB9liCswFiJxKt4RjcgV6ZEf XNMKq1uNSs3sMOo9S/1rKKD4rzvg1r0d0iASkk96naqx/FDa1htSCytlYpjaMmRH6YDQpFZ+jmV iMAK+6b2HNR3l5w== X-Developer-Key: i=avrac@freebox.fr; a=openpgp; fpr=6225092072BB58E3CEEC091E75392A176D952DB4 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This series include misc fixes related to hardware resource allocations in the msm dpu driver, some specifically for msm8998 (including hw catalog fixes and cursor sspp support for cursor planes, instead of using Smart DMA pipes). This series has been tested on msm8998 with additional patches to enable hdmi support. The following modetest example command works now; 8 planes can be displayed simultaneously on msm8998 in 1080p, including a cursor plane, using a single LM: modetest -Mmsm -a \ -s 32:1920x1080-60 \ -P 33@87:1920x1080+0+0@XR24 \ -P 39@87:200x200+100+600@AR24 \ -P 45@87:200x200+200+500@AR24 \ -P 51@87:200x200+300+400@AR24 \ -P 57@87:200x200+400+300@AR24 \ -P 63@87:200x200+500+200@AR24 \ -P 69@87:200x200+600+100@AR24 \ -P 81@87:200x200+700+000@AR24 Signed-off-by: Arnaud Vrac --- Arnaud Vrac (11): drm/msm/dpu: tweak msm8998 hw catalog values drm/msm/dpu: use the actual lm maximum width instead of a hardcoded value drm/msm/dpu: use hsync/vsync polarity set by the encoder drm/msm/dpu: allow using lm mixer base stage drm/msm/dpu: allow using all lm mixer stages drm/msm/dpu: support cursor sspp hw blocks drm/msm/dpu: add sspp cursor blocks to msm8998 hw catalog drm/msm/dpu: fix cursor block register bit offset in msm8998 hw catalog drm/msm/dpu: set max cursor width to 512x512 drm/msm/dpu: tweak lm pairings in msm8998 hw catalog drm/msm/dpu: do not use mixer that supports dspp when not required .../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 28 +++++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 ++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 49 +++++++++++++++++----- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 16 ++----- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 +++++++--- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 32 +++++++++++--- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 +- 7 files changed, 107 insertions(+), 52 deletions(-) --- base-commit: e3342532ecd39bbd9c2ab5b9001cec1589bc37e9 change-id: 20230419-dpu-tweaks-5475305621d9 Best regards,