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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id dn22-20020a05640222f600b00532c1dfe8ecsm635878edb.66.2023.09.19.05.46.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 05:46:03 -0700 (PDT) From: Luca Weiss Subject: [PATCH v2 0/7] Initial support for the Fairphone 5 smartphone Date: Tue, 19 Sep 2023 14:45:54 +0200 Message-Id: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAAKYCWUC/1XMwQoCIRSF4VcZ7jpDnQynVe8Rs1BH80Kp6CDF4 LtnQ5uW/4HzbVBsRlvgMmyQbcWCMfTghwGMV+FuCS69gVM+UskkcUkQDLiiehB9NpIzqtVkJPR Hytbha9duc2+PZY35veOVfdefM9I/pzJCiVCTOAk2aa2Wq1OYk4/BHk18wtxa+wCZ7WMEqgAAA A== To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss , Krzysztof Kozlowski X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support to boot up mainline kernel on the QCM6490-based Fairphone 5 smartphone. These patches only cover a part of the functionality brought up on mainline so far, with the rest needing larger dts and driver changes or depend on patches that are not yet merged. I will work on sending those once these base patches here have settled. Since QCM6490, like SC7280 are 'yupik' in the vendor-provided kernel, we can base the dts on it and leverage existing support. Though current sc7280 support mostly assumes ChromeOS devices which have a different TrustZone setup, so we need to move some ChromeOS-specific bits to the sc7280-chrome-common.dtsi file to make it boot on a standard TZ board. Depends on (just for the #include in sc7280.dtsi): https://lore.kernel.org/linux-arm-msm/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.com/ The pm7250b patch has been picked up from this series: https://lore.kernel.org/linux-arm-msm/20230407-pm7250b-sid-v1-2-fc648478cc25@fairphone.com/ Signed-off-by: Luca Weiss --- Changes in v2: - Add comments why nodes in sc7280.dtsi get disabled (Konrad) - Mark more nodes in sc7280.dtsi as reserved - Don't allow writing qfprom when (optional) clock isn't found - Device dts changes: - Stylistic changes in device dts - Remove qcom,msm-id & qcom,board-id properties - Add regulator-initial-mode - Pick up tags - Drop patch 03 "arm64: dts: qcom: sc7280: Move qfprom clock to chrome-common", it's actually not needed with qfprom-clock-optional patch - Drop patch 07 "dt-bindings: arm: qcom,ids: Add SoC ID for QCM6490", patch 08 "soc: qcom: socinfo: Add SoC ID for QCM6490" and patch 09 "cpufreq: Add QCM6490 to cpufreq-dt-platdev blocklist", all applied. - Link to v1: https://lore.kernel.org/r/20230830-fp5-initial-v1-0-5a954519bbad@fairphone.com --- Luca Weiss (7): arm64: dts: qcom: sc7280: Mark some nodes as 'reserved' nvmem: qfprom: Mark core clk as optional arm64: dts: qcom: pm7250b: make SID configurable arm64: dts: qcom: pm8350c: Add flash led node dt-bindings: pinctrl: qcom,sc7280: Allow gpio-reserved-ranges dt-bindings: arm: qcom: Add QCM6490 Fairphone 5 arm64: dts: qcom: qcm6490: Add device-tree for Fairphone 5 Documentation/devicetree/bindings/arm/qcom.yaml | 6 + .../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 4 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/pm7250b.dtsi | 14 +- arch/arm64/boot/dts/qcom/pm8350c.dtsi | 6 + arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 667 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 24 + arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 +- arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 4 + drivers/nvmem/qfprom.c | 6 +- 10 files changed, 729 insertions(+), 11 deletions(-) --- base-commit: b3b1378016952541463ef2369da780d4f9bf02b3 change-id: 20230818-fp5-initial-b6c8210ba9c8 Best regards,