| Message ID | 20231118042730.2799-1-quic_c_gdjako@quicinc.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add support for Translation Buffer Units | expand |
On 18/11/2023 04:27, Georgi Djakov wrote: > The TCUs (Translation Control Units) and TBUs (Translation Buffer > Units) are key components of the MMU-500. Multiple TBUs are connected > to a single TCU over an interconnect. Each TBU contains a TLB that > caches page tables. The MMU-500 implements a TBU for each connected > master, and the TBU is designed, so that it is local to the master. > > The Qualcomm SDM845 platform has an implementation of the SMMU-500, > that has multiple TBUs. A DT schema is added to describe the resources > for each TBU (register space, power-domains, interconnects and clocks). > > The TBU driver will manage the resources and allow the system to > operate the TBUs during a context fault to obtain details by doing > s1 inv, software + hardware page table walks etc. This is implemented > with ATOS/eCATs as the ATS feature is not supported. Being able to > query the TBUs is useful for debugging various hardware/software > issues on these platforms. > > v2: > - Improve DT binding description, add full example. (Konrad) > - Drop Qcom specific stuff from the generic binding. (Rob) > - Unconditionally try to populate subnodes. (Konrad) > - Improve TBU driver commit text, remove memory barriers. (Bjorn) > - Move TBU stuff into separate file. Make the driver builtin. > - TODO: Evaluate whether to keep TBU support as a separate driver > or just instantiate things from qcom_smmu_impl_init() > > v1: https://lore.kernel.org/r/20231019021923.13939-1-quic_c_gdjako@quicinc.com What is your suggested way to test this series ? --- bod
On 11/18/2023 1:21 PM, Bryan O'Donoghue wrote: > On 18/11/2023 04:27, Georgi Djakov wrote: >> The TCUs (Translation Control Units) and TBUs (Translation Buffer >> Units) are key components of the MMU-500. Multiple TBUs are connected >> to a single TCU over an interconnect. Each TBU contains a TLB that >> caches page tables. The MMU-500 implements a TBU for each connected >> master, and the TBU is designed, so that it is local to the master. >> >> The Qualcomm SDM845 platform has an implementation of the SMMU-500, >> that has multiple TBUs. A DT schema is added to describe the resources >> for each TBU (register space, power-domains, interconnects and clocks). >> >> The TBU driver will manage the resources and allow the system to >> operate the TBUs during a context fault to obtain details by doing >> s1 inv, software + hardware page table walks etc. This is implemented >> with ATOS/eCATs as the ATS feature is not supported. Being able to >> query the TBUs is useful for debugging various hardware/software >> issues on these platforms. >> >> v2: >> - Improve DT binding description, add full example. (Konrad) >> - Drop Qcom specific stuff from the generic binding. (Rob) >> - Unconditionally try to populate subnodes. (Konrad) >> - Improve TBU driver commit text, remove memory barriers. (Bjorn) >> - Move TBU stuff into separate file. Make the driver builtin. >> - TODO: Evaluate whether to keep TBU support as a separate driver >> or just instantiate things from qcom_smmu_impl_init() >> >> v1: https://lore.kernel.org/r/20231019021923.13939-1-quic_c_gdjako@quicinc.com > > What is your suggested way to test this series ? Hi Bryan, Just break some driver to initiate a memory transaction with no valid context. I used venus for that. Or the simplest would be to just specify an invalid stream ID in DT for some device. Thanks, Georgi