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Mon, 18 Mar 2024 03:09:49 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id u8-20020a5d4688000000b0033e3c4e600asm9533734wrq.7.2024.03.18.03.09.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 03:09:48 -0700 (PDT) From: Neil Armstrong Subject: [PATCH v4 0/2] drm/msm: Add support for the A750 GPU found on the SM8650 platform Date: Mon, 18 Mar 2024 11:09:44 +0100 Message-Id: <20240318-topic-sm8650-gpu-v4-0-206eb0d31694@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAOgS+GUC/23NQQ6CMBCF4auQrq2ZDgWKK+9hXFAYoIlS0iLRE O5uIS4wsPxfMt9MzJMz5Nklmpij0XhjuxDyFLGyLbqGuKlCMwSUgKD4YHtTcv9UaQK86V9cqrx KCEvUImPhrHdUm/dK3u6hW+MH6z7rh1Es6w8TuMdGwYFnoAoJOpOZTq4P0xXOnq1r2KKNuBWSA wGDkGoCLXWNBPlOiLdCeiDEQSAtaqlVWqkq/hPmef4CdYMrfTUBAAA= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Unlike the the very close A740 GPU on the SM8550 SoC, the A750 GPU doesn't have an HWCFG block but a separate register set. The missing registers are added in the a6xx.xml.h file that would require a subsequent sync and the non-existent hwcfg is handled in a6xx_set_hwcg(). The A750 GPU info are added under the adreno_is_a750() macro and the ADRENO_7XX_GEN3 family id. This adds: - DT nodes Dependencies: None Tested using Mesa's main branch on the SM8650-QRD and with kmscube & vkcube to test basic rendering. Signed-off-by: Neil Armstrong --- Changes in v4: - Dropped applied patches - Added a few more OPPs that are safe on all SKUs - Re-ordered the OPPs - Link to v3: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-0-eb1f4b86d8d3@linaro.org Changes in v3: - Fixed smmu bindings if condition for GMU smmu - Collected reviews - Link to v2: https://lore.kernel.org/r/20240215-topic-sm8650-gpu-v2-0-6be0b4bf2e09@linaro.org Changes in v2: - Added separate a6xx.xml.h sync from https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27576 - Collected review tags - Inlined skip_programming - Use A7XX_RBBM_CGC_P2S_STATUS_TXDONE instead of BIT(0) - Drop now useless placeholder comment - Removed interconnect properties - Rebased on current linux-next - Link to v1: https://lore.kernel.org/r/20240212-topic-sm8650-gpu-v1-0-708a40b747b5@linaro.org --- Neil Armstrong (2): arm64: dts: qcom: sm8650: add GPU nodes arm64: dts: qcom: sm8650-qrd: enable GPU arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 8 ++ arch/arm64/boot/dts/qcom/sm8650.dtsi | 181 ++++++++++++++++++++++++++++++++ 2 files changed, 189 insertions(+) --- base-commit: 2e93f143ca010a5013528e1cfdc895f024fe8c21 change-id: 20240208-topic-sm8650-gpu-489d5e2c2b17 Best regards,