Message ID | 20240715-sa8775p-mm-v3-v1-0-badaf35ed670@quicinc.com (mailing list archive) |
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Mon, 15 Jul 2024 08:23:31 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46F8NVi0013003 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 15 Jul 2024 08:23:31 GMT Received: from hu-tdas-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 15 Jul 2024 01:23:26 -0700 From: Taniya Das <quic_tdas@quicinc.com> Subject: [PATCH v3 0/8] Add support for SA8775P Multimedia clock controllers Date: Mon, 15 Jul 2024 13:53:15 +0530 Message-ID: <20240715-sa8775p-mm-v3-v1-0-badaf35ed670@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; 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Add support for SA8775P Multimedia clock controllers
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Add support for videocc, camcc, dispcc0 and dispcc1 on Qualcomm SA8775P platform. Changes in [v3] compared to [v2]: Update the qcom_cc_really_probe() to use &pdev->dev, for the CAMCC, DISPCC & VIDEOCC drivers. [v2] https://lore.kernel.org/all/20240612-sa8775p-mm-clock-controllers-v1-0-db295a846ee7@quicinc.com/ Changes in [v2] compared to [v1]: [PATCH 1/8]: Updated bindings to reference qcom,gcc.yaml [PATCH 3/8]: Updated bindings to reference qcom,gcc.yaml [PATCH 5/8]: Updated bindings to reference qcom,gcc.yaml [PATCH 7/8]: Split updating sleep_clk frequency to separate patch [PATCH 8/8]: Newly added to update sleep_clk frequency to 32000 These multimedia clock controller and device tree patches are split from the below [v1] series. [v1] https://lore.kernel.org/all/20240531090249.10293-1-quic_tdas@quicinc.com/ Signed-off-by: Taniya Das <quic_tdas@quicinc.com> --- Taniya Das (8): dt-bindings: clock: qcom: Add SA8775P video clock controller clk: qcom: Add support for Video clock controller on SA8775P dt-bindings: clock: qcom: Add SA8775P camera clock controller clk: qcom: Add support for Camera Clock Controller on SA8775P dt-bindings: clock: qcom: Add SA8775P display clock controllers clk: qcom: Add support for Display clock Controllers on SA8775P arm64: dts: qcom: Add support for multimedia clock controllers arm64: dts: qcom: Update sleep_clk frequency to 32000 on SA8775P .../bindings/clock/qcom,sa8775p-camcc.yaml | 62 + .../bindings/clock/qcom,sa8775p-dispcc.yaml | 79 + .../bindings/clock/qcom,sa8775p-videocc.yaml | 62 + arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 2 +- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 56 + drivers/clk/qcom/Kconfig | 31 + drivers/clk/qcom/Makefile | 3 + drivers/clk/qcom/camcc-sa8775p.c | 1849 ++++++++++++++++++++ drivers/clk/qcom/dispcc0-sa8775p.c | 1481 ++++++++++++++++ drivers/clk/qcom/dispcc1-sa8775p.c | 1481 ++++++++++++++++ drivers/clk/qcom/videocc-sa8775p.c | 576 ++++++ include/dt-bindings/clock/qcom,sa8775p-camcc.h | 107 ++ include/dt-bindings/clock/qcom,sa8775p-dispcc.h | 87 + include/dt-bindings/clock/qcom,sa8775p-videocc.h | 47 + 14 files changed, 5922 insertions(+), 1 deletion(-) --- base-commit: 3fe121b622825ff8cc995a1e6b026181c48188db change-id: 20240715-sa8775p-mm-v3-27a7a25e87a2 Best regards,