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[95.234.170.37]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8988ff4233sm227157866b.25.2024.08.30.08.33.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2024 08:33:13 -0700 (PDT) From: Antonino Maniscalco Subject: [PATCH v2 0/9] Preemption support for A7XX Date: Fri, 30 Aug 2024 17:32:42 +0200 Message-Id: <20240830-preemption-a750-t-v2-0-86aeead2cd80@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIABrm0WYC/32NTQ6CMBCFr0Jm7Zj+YcGV9zAsShlgEqGkJURDu LuVA7j8Xt773g6JIlOCe7FDpI0ThzmDuhTgRzcPhNxlBiWUEZUscYlE07LmGjpbClyx90S1q4x pdQ15lxs9v0/ns8k8clpD/JwXm/yl/2ybRIG27Zy6eW2Eto9hcvy6+jBBcxzHF0f9E6eyAAAA To: Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Antonino Maniscalco , Akhil P Oommen , Neil Armstrong , Sharat Masetty X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1725031992; l=2848; i=antomani103@gmail.com; s=20240815; h=from:subject:message-id; bh=+/XloqlmCsquY7kMKECVJCoaSk/Is6TefQiw2Wa+1Fk=; b=w9oRe0fzxNWwC/eWWHvVBB6Yv22prxU4QaZz5P1TKaHgZzw762E/J40AjyHtsIWM/tFdIDRSd WSpN0PDPkx+AJrp9LYIholowKlxQ+RYnQci5ekgBaJcBY18hAAjWn4T X-Developer-Key: i=antomani103@gmail.com; a=ed25519; pk=0zicFb38tVla+iHRo4kWpOMsmtUrpGBEa7LkFF81lyY= This series implements preemption for A7XX targets, which allows the GPU to switch to an higher priority ring when work is pushed to it, reducing latency for high priority submissions. This series enables L1 preemption with skip_save_restore which requires the following userspace patches to function: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544 A flag is added to `msm_submitqueue_create` to only allow submissions from compatible userspace to be preempted, therefore maintaining compatibility. Some commits from this series are based on a previous series to enable preemption on A6XX targets: https://lkml.kernel.org/1520489185-21828-1-git-send-email-smasetty@codeaurora.org Signed-off-by: Antonino Maniscalco --- Changes in v2: - Added preept_record_size for X185 in PATCH 3/7 - Added patches to reset perf counters - Dropped unused defines - Dropped unused variable (fixes warning) - Only enable preemption on a750 - Reject MSM_SUBMITQUEUE_ALLOW_PREEMPT for unsupported targets - Added Akhil's Reviewed-By tags to patches 1/9,2/9,3/9 - Added Neil's Tested-By tags - Added explanation for UAPI changes in commit message - Link to v1: https://lore.kernel.org/r/20240815-preemption-a750-t-v1-0-7bda26c34037@gmail.com --- Antonino Maniscalco (9): drm/msm: Fix bv_fence being used as bv_rptr drm/msm: Add submitqueue setup and close drm/msm: Add a `preempt_record_size` field drm/msm/A6xx: Implement preemption for A7XX targets drm/msm/A6xx: Sync relevant adreno_pm4.xml changes drm/msm/A6xx: Use posamble to reset counters on preemption drm/msm/A6xx: Add traces for preemption drm/msm/A6XX: Add a flag to allow preemption to submitqueue_create drm/msm/A6xx: Enable preemption for A750 drivers/gpu/drm/msm/Makefile | 1 + drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 4 + drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 353 +++++++++++++++- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 174 ++++++++ drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 462 +++++++++++++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.h | 8 +- drivers/gpu/drm/msm/msm_gpu.h | 7 + drivers/gpu/drm/msm/msm_gpu_trace.h | 28 ++ drivers/gpu/drm/msm/msm_ringbuffer.h | 8 + drivers/gpu/drm/msm/msm_submitqueue.c | 13 + .../gpu/drm/msm/registers/adreno/adreno_pm4.xml | 39 +- include/uapi/drm/msm_drm.h | 5 +- 12 files changed, 1062 insertions(+), 40 deletions(-) --- base-commit: 7c626ce4bae1ac14f60076d00eafe71af30450ba change-id: 20240815-preemption-a750-t-fcee9a844b39 Best regards,