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Thu, 17 Oct 2024 09:28:43 GMT Received: from [10.213.98.28] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 17 Oct 2024 02:28:38 -0700 From: Jagadeesh Kona Subject: [PATCH 0/3] Add support to scale DDR and L3 on SA8775P Date: Thu, 17 Oct 2024 14:58:29 +0530 Message-ID: <20241017-sa8775p-cpufreq-l3-ddr-scaling-v1-0-074e0fb80b33@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAL3YEGcC/x3NQQrCQAxA0auUrA10anVar1JcpJm0Bso4JihC6 d0dXL7N/zu4mIrDrdnB5KOuz1wRTg3wg/IqqKkaurbrQxsiOg0xXgpyeS8mL9zOmJKhM22aV6R AI80s48BXqJFisuj3P5jux/EDXfXzI3AAAAA= X-Change-ID: 20241017-sa8775p-cpufreq-l3-ddr-scaling-a1a9abce98c6 To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Ajit Pandey , "Imran Shaik" , Taniya Das , "Satya Priya Kakitapalli" , Jagadeesh Kona , Shivnandan Kumar X-Mailer: b4 0.14.2 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: sCdxhCTpgHTnlh0bmgA2e_hrVv3UGXvX X-Proofpoint-GUID: sCdxhCTpgHTnlh0bmgA2e_hrVv3UGXvX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 clxscore=1011 impostorscore=0 mlxscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 spamscore=0 mlxlogscore=432 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410170063 Add support to scale DDR and L3 based on CPU frequencies on Qualcomm SA8775P platform. Also add support for LMH interrupts to indicate if there is any thermal throttle. The changes in this series are dependent on below series changes: https://lore.kernel.org/linux-arm-msm/20240904171209.29120-1-quic_rlaggysh@quicinc.com/#t Signed-off-by: Jagadeesh Kona --- Jagadeesh Kona (2): arm64: dts: qcom: sa8775p: Add support to scale DDR/L3 arm64: dts: qcom: sa8775p: Add LMH interrupts support Shivnandan Kumar (1): arm64: dts: qcom: sa8775p: Add CPU OPP tables to scale DDR/L3 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 215 ++++++++++++++++++++++++++++++++++ 1 file changed, 215 insertions(+) --- base-commit: d1ef2d48e83b32417eb55480c097737364535405 change-id: 20241017-sa8775p-cpufreq-l3-ddr-scaling-a1a9abce98c6 Best regards,