Message ID | 20241019-sar2130p-phys-v1-0-bf06fcea2421@linaro.org (mailing list archive) |
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[2001:14ba:a0c3:3a00:70b:e6fc:b322:6a1b]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53a15211401sm562854e87.249.2024.10.19.08.44.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Oct 2024 08:44:54 -0700 (PDT) From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Subject: [PATCH 0/6] phy: qualcomm: add support for USB+DP and PCIe PHYs on SAR2130P Date: Sat, 19 Oct 2024 18:44:49 +0300 Message-Id: <20241019-sar2130p-phys-v1-0-bf06fcea2421@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAPHTE2cC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIxNDA0Nz3eLEIiNDY4MC3YKMymJdEyMzc2PjJAsDQzNLJaCegqLUtMwKsHn RsbW1AKS8XxlfAAAA X-Change-ID: 20241017-sar2130p-phys-426733b80169 To: Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1542; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Vwq8dyZKEj2ygSd1yqgy0fl5gmIjHUGwyRng0MKb4hQ=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBnE9PzYZWOONvC1WZ8PZ1mKMr6Opf7JrXjbI6m2 MuG5OluqPmJAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZxPT8wAKCRAU23LtvoBl uEHcD/4gLcV0Lbco6iiFQ+CfYZbWxZNV6Qx8VSQuh15OTmj1Z+XkqjCJlAuMR8vbj4LTrn8t8Sr Nq0ApJUOP2m0dhsoDhP6L7rRJxHmNMRgu5xjSKWuU/YwNG+NaRuNFaLWE/2WzDbmbBYmMnf0IC/ bNVMvzDPY6NDB6X6CYCzoOdJYn4waPRly+0l86I2LKXPVSFQ4L/iz5LRxGmz7nZenesikXu/88i SbUwoXl3u0zAYgkdOeaE4kn8QtWOLuhowmb+CMzEGHtr1jNxQdNDQ+ShUAd7FZ4ttGvSxZ1QRHw aOpqfl24Xw7vTVHakbP0v7KB2A2E/U1slpY9KuGy6N3uvaAjfmf4tQny7vO2j1uEMSCxhD03VDz bw41W8hfn0izP9IKN8yqkzhIqudR6dOLjsGe6VanZvUWbZnvgL/LPZtUokWrQvMZU+vkhoQL/BQ L9Pdgd9RqgICCHSbAAfkHIdbVRZkc/taz0fG3VyI1JtAIi15Al5a+Hi/rnqXcArq+oDnSpjsLSJ /EJxJ9HqPRWhuALrdDBtkhMP44Ur2e1W5fKjRpf4maRJ9Sky0vNr67lHnjb46hiqX1a7ul1tUYG U7m7tqbyobhOKpD9wLp2cDhxwgc++NASzbXvnNJYaFiRCFjXqE+Blr1fjmxrTU+DRsN03Ha23yU ALi0q+NAgB43eBQ== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A |
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phy: qualcomm: add support for USB+DP and PCIe PHYs on SAR2130P
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Add support for the USB+DP Combo PHY and PCIe PHY on the Qualcomm SAR2130P platform. The DP part of the combo PHY wasn't yet tested, but it is not possible to support just the USB part of the PHY. DP part might require additional fixes later. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- Dmitry Baryshkov (6): dt-bindings: phy: qcom,sc8280xp-qmp-usb32dp: Add SAR2130P compatible dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add SAR2130P compatible phy: qualcomm: qmp-combo: add support for SAR2130P phy: qualcomm: qmp-pcie: split PCS_LANE1 region phy: qualcomm: qmp-pcie: define several new registers phy: qualcomm: qmp-pcie: add support for SAR2130P .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 2 + .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 2 + drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 100 ++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 173 ++++++++++++++++++++- drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h | 5 +- drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h | 5 +- drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h | 3 + drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 2 + .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6.h | 1 + 9 files changed, 284 insertions(+), 9 deletions(-) --- base-commit: f2493655d2d3d5c6958ed996b043c821c23ae8d3 change-id: 20241017-sar2130p-phys-426733b80169 Best regards,