Message ID | 20241025181010.7555-1-quic_jseerapu@quicinc.com (mailing list archive) |
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Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4472200B9E; Fri, 25 Oct 2024 18:10:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729879839; cv=none; b=Iz0NUtw6Tw+eq/sOo5hSLxjA+n5QI9SIlZx9wiAmZ66q6M+UZONy+px4LZGpvzpJEWZ30TOtEECQYXywjczRrsjQV+HTZ/2q3gXePVFP6TYkGfdBlPmnXn9MXPxE5Wc2jZ/gvQae0sKiLypLBvH8aWe4Bl+w+c//2MUwhPmXr9c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729879839; c=relaxed/simple; bh=cN6fc+l9w3fXvNQkNpCtBE6d3MCpI0KtngEwDe5xOZE=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=rcFfSDAdQaus7TvxkiOHDWL7ofpxrc9cmjpi0Kg5voZGfprGYFNfjeYreTg9xBU1A4GkhfjQHLkU4V0qnvlv9LRSVXgRDatVqcPHBTU7trVzcIVPuekXi9wG2uxXK84/PWOtHHGGhY3MHie07zk/7QJTP8iOjHDBUVS4DICy5pA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=B9KhsNqg; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="B9KhsNqg" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49PBowBO009099; Fri, 25 Oct 2024 18:10:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-type:date:from:message-id:mime-version:subject:to; s= qcppdkim1; bh=sxUUwmhFaPuoMwnZaOrlOdteCBTzOmWEbOZ3EA4q5B0=; b=B9 KhsNqg5Uju0YmojfqFyDc/wO1rutaFMWu8ZkLTQ0Sd1pThirlHTySGR68e3rb1JO FbPCJ7HIZxBup4Od4GLwBe4IExJkqj6jI0CkwPf/Ws5MA18SI4XIwjOlk9NiGb6B j0Hpx5ulOkyVVpmwxxIvBUpUWDmQN3bZIqSEwrgAuJEDVjtBtcMvQYKyjJHanTgV 96U+lxbiDkmxKWRjIgwcM2nR+sd5Wa95FG8+Wx5SSvNSxALLoIKcoc0rjNufbUZ7 yOHwm03fhJjpHLBLyDpUkA9SwIglvUt3QIlOzlqs2PoFM0GMNaP5Aeffxb89xn+m X8OD9gVwJFMoTsOCBZeA== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 42em43j1q3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Oct 2024 18:10:29 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49PIAStK023486 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Oct 2024 18:10:28 GMT Received: from hu-jseerapu-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 25 Oct 2024 11:10:24 -0700 From: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> To: Vinod Koul <vkoul@kernel.org>, Andi Shyti <andi.shyti@kernel.org>, "Sumit Semwal" <sumit.semwal@linaro.org>, =?utf-8?q?Christian_K=C3=B6nig?= <christian.koenig@amd.com> CC: <linux-arm-msm@vger.kernel.org>, <dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>, <linux-media@vger.kernel.org>, <dri-devel@lists.freedesktop.org>, <linaro-mm-sig@lists.linaro.org>, <quic_msavaliy@quicinc.com>, <quic_vtanuku@quicinc.com> Subject: [PATCH v2 0/3] Add Block event interrupt support for I2C protocol Date: Fri, 25 Oct 2024 23:40:07 +0530 Message-ID: <20241025181010.7555-1-quic_jseerapu@quicinc.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: G3ymxqY7NZ-QQOQ6UtigGScoJJVLo1ra X-Proofpoint-ORIG-GUID: G3ymxqY7NZ-QQOQ6UtigGScoJJVLo1ra X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 adultscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 impostorscore=0 phishscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410250138 |
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Add Block event interrupt support for I2C protocol
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