[0/2] Add support for GPU SMMU on QCS615

Message ID	20241122074922.28153-1-quic_qqzhou@quicinc.com (mailing list archive)
Headers	show Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47CC016C695; Fri, 22 Nov 2024 07:49:53 +0000 (UTC) From: Qingqing Zhou <quic_qqzhou@quicinc.com> To: <andersson@kernel.org>, <konradybcio@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>, <robimarko@gmail.com>, <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org> CC: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>, Qingqing Zhou <quic_qqzhou@quicinc.com> Subject: [PATCH 0/2] Add support for GPU SMMU on QCS615 Date: Fri, 22 Nov 2024 13:19:20 +0530 Message-ID: <20241122074922.28153-1-quic_qqzhou@quicinc.com> Precedence: bulk MIME-Version: 1.0 Content-Type: text/plain
Series	Add support for GPU SMMU on QCS615 \| expand [0/2] Add support for GPU SMMU on QCS615 [1/2] dt-bindings: arm-smmu: document QCS615 GPU SMMU [2/2] arm64: dts: qcom: qcs615: add the GPU SMMU node

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20241122074922.28153-1-quic_qqzhou@quicinc.com (mailing list archive)

Headers

From: Qingqing Zhou <quic_qqzhou@quicinc.com>
To: <andersson@kernel.org>, <konradybcio@kernel.org>, <robh@kernel.org>,
        <krzk+dt@kernel.org>, <conor+dt@kernel.org>, <robimarko@gmail.com>,
        <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>
CC: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
        Qingqing Zhou
	<quic_qqzhou@quicinc.com>
Subject: [PATCH 0/2] Add support for GPU SMMU on QCS615
Date: Fri, 22 Nov 2024 13:19:20 +0530
Message-ID: <20241122074922.28153-1-quic_qqzhou@quicinc.com>
Precedence: bulk
MIME-Version: 1.0
Content-Type: text/plain

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Add support for GPU SMMU on QCS615 | expand

Message

Qingqing Zhou Nov. 22, 2024, 7:49 a.m. UTC

Enable GPU SMMU function on QCS615 platform. GPU SMMU is required
for address translation in GPU device.

device tree dependency:
https://lore.kernel.org/all/20241104-add_initial_support_for_qcs615-v5-0-9dde8d7b80b0@quicinc.com/

gpucc dependency:
https://lore.kernel.org/all/20241108-qcs615-mm-dt-nodes-v1-0-b2669cac0624@quicinc.com/
https://lore.kernel.org/all/20241108-qcs615-mm-clockcontroller-v3-0-7d3b2d235fdf@quicinc.com/

SCM dependency:
https://lore.kernel.org/all/20241105032107.9552-1-quic_qqzhou@quicinc.com/

Qingqing Zhou (2):
  dt-bindings: arm-smmu: document QCS615 GPU SMMU
  arm64: dts: qcom: qcs615: add the GPU SMMU node

 .../devicetree/bindings/iommu/arm,smmu.yaml   |  3 ++-
 arch/arm64/boot/dts/qcom/qcs615.dtsi          | 27 +++++++++++++++++++
 2 files changed, 29 insertions(+), 1 deletion(-)


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