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Sun, 29 Dec 2024 15:23:36 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4BTFNalv004464; Sun, 29 Dec 2024 15:23:36 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 4BTFNaSE004461 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sun, 29 Dec 2024 15:23:36 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id 15FCD59C; Sun, 29 Dec 2024 20:53:35 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, Wasim Nazir Subject: [PATCH v5 0/6] arm64: qcom: Add support for QCS9075 boards Date: Sun, 29 Dec 2024 20:53:26 +0530 Message-ID: <20241229152332.3068172-1-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.47.0 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: _ArfkUcs_tNVflW9gZNWBovh4pbofMS6 X-Proofpoint-GUID: _ArfkUcs_tNVflW9gZNWBovh4pbofMS6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 priorityscore=1501 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 impostorscore=0 mlxlogscore=995 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412290137 This series: Add support for Qualcomm's rb8, ride/ride-r3 boards using QCS9075 SoC. QCS9075 is compatible IoT-industrial grade variant of SA8775p SoC. Unlike QCS9100, it doesn't have safety monitoring feature of Safety-Island(SAIL) subsystem, which affects thermal management. In QCS9100 SoC, the safety subsystem monitors all thermal sensors and does corrective action for each subsystem based on sensor violation to comply safety standards. But as QCS9075 is non-safe SoC it requires conventional thermal mitigation for thermal management. Difference between Ride & ride-r3 boards is ethernet phy, ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. This series depends on [1] for thermal functionality to work. [1]: https://lore.kernel.org/all/20241112-sa8775p_cpuidle-v1-1-66ff3ba72464@quicinc.com/ --- Changelog: v5: - Remove defconfig patch as the config is product specific. - v4: https://lore.kernel.org/all/20241217064856.2772305-1-quic_wasimn@quicinc.com/ v4: - Replace dts to dtsi in Ride/Ride-r3 platform files. - Add thermal patch to differentiate between 9100 vs 9075. - Add proper abbreviation and update commit for 9100 vs 9075. - v3: https://lore.kernel.org/all/20241119174954.1219002-1-quic_wasimn@quicinc.com/ v3: - Fix RB8 board compatible string. - v2: https://lore.kernel.org/all/20241115225152.3264396-1-quic_wasimn@quicinc.com/ v2: - Remove unused dp nodes & update commit for ride vs ride-r3. - v1: https://lore.kernel.org/all/20241110145339.3635437-1-quic_wasimn@quicinc.com/ Manaf Meethalavalappu Pallikunhi (1): arm64: dts: qcom: Enable cpu cooling devices for QCS9075 platforms Wasim Nazir (5): dt-bindings: arm: qcom,ids: add SoC ID for QCS9075 soc: qcom: socinfo: add QCS9075 SoC ID dt-bindings: arm: qcom: Document rb8/ride/ride-r3 on QCS9075 arm64: dts: qcom: Add support for QCS9075 RB8 arm64: dts: qcom: Add support for QCS9075 Ride & Ride-r3 .../devicetree/bindings/arm/qcom.yaml | 9 + arch/arm64/boot/dts/qcom/Makefile | 3 + arch/arm64/boot/dts/qcom/qcs9075-rb8.dts | 282 +++++++++++++++++ arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 47 +++ arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 47 +++ arch/arm64/boot/dts/qcom/qcs9075-thermal.dtsi | 287 ++++++++++++++++++ drivers/soc/qcom/socinfo.c | 1 + include/dt-bindings/arm/qcom,ids.h | 1 + 8 files changed, 677 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-rb8.dts create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-thermal.dtsi base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2 -- 2.47.0