Message ID | 20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org (mailing list archive) |
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dt-bindings: display: qcom,sm8[56]50-mdss: properly document the interconnect paths
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The mdp1-mem is not supported on the SM8550 & SM8650 SoCs, so properly document the mdp0-mem and cpu-cfg interconnect entries. This fixes the following errors: display-subsystem@ae00000: interconnects: [[200, 3, 7, 32, 1, 7]] is too short from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml# display-subsystem@ae00000: interconnect-names: ['mdp0-mem'] is too short from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml# Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Changes in v3: - EDITME: describe what is new in this series revision. - EDITME: use bulletpoints and terse descriptions. - Link to v2: https://lore.kernel.org/r/20250207-topic-sm8x50-mdss-interconnect-bindings-fix-v2-0-f712b8df6020@linaro.org Changes in v2: - fixed example in qcom,sm8550-mdss.yaml - Link to v1: https://lore.kernel.org/r/20250207-topic-sm8x50-mdss-interconnect-bindings-fix-v1-0-852b1d6aee46@linaro.org --- Neil Armstrong (4): dt-bindings: display: qcom,sm8550-mdss: explicitly document mdp0-mem and cpu-cfg interconnect paths dt-bindings: display: qcom,sm8650-mdss: explicitly document mdp0-mem and cpu-cfg interconnect paths arm64: dts: qcom: sm8550: add missing cpu-cfg interconnect path in the mdss node arm64: dts: qcom: sm8650: add missing cpu-cfg interconnect path in the mdss node .../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 14 +++++++++----- .../devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml | 13 +++++++++++-- arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 +++-- arch/arm64/boot/dts/qcom/sm8650.dtsi | 7 +++++-- 4 files changed, 28 insertions(+), 11 deletions(-) --- base-commit: 808eb958781e4ebb6e9c0962af2e856767e20f45 change-id: 20250207-topic-sm8x50-mdss-interconnect-bindings-fix-dd975f223d05 Best regards,