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[v5,0/5] nvmem: qfprom: add Qualcomm SAR2130P support

Message ID 20250217-sar2130p-nvmem-v5-0-2f01049d1eea@linaro.org (mailing list archive)
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Series nvmem: qfprom: add Qualcomm SAR2130P support | expand

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Dmitry Baryshkov Feb. 17, 2025, 4:33 p.m. UTC
Qualcomm SAR2130P is one of the platforms which require 4-byte reads
when accessing the QFPROM data. Fix several omission in the NVMEM core,
rework the QFPROM driver to use readl() instead of readb() and finally
add compatible string for the QFPROM as present on the Qualcomm
SAR2130P.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Changes in v5:
- Expanded fixed-cell schema to allow starting bit greater than 7
  (Srini)
- Dropped the applied schema patch (Rob)
- Link to v4: https://lore.kernel.org/r/20250109-sar2130p-nvmem-v4-0-633739fe5f11@linaro.org

Changes in v4:
- Fix conition for bits vs bytes overflow (Akhil)
- Link to v3: https://lore.kernel.org/r/20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org

Changes in v3:
- Reworked the qfprom driver to specify stride and word size (Srinivas)
- Link to v2: https://lore.kernel.org/r/20241027-sar2130p-nvmem-v2-0-743c1271bf2d@linaro.org

Changes in v2:
- Picked up required patch from QCLinux.
- Link to v1: https://lore.kernel.org/r/20241017-sar2130p-nvmem-v1-1-6cc32789afc6@linaro.org

---
Dmitry Baryshkov (5):
      dt-bindings: nvmem: fixed-cell: increase bits start value to 31
      nvmem: core: fix bit offsets of more than one byte
      nvmem: core: verify cell's raw_len
      nvmem: core: update raw_len if the bit reading is required
      nvmem: qfprom: switch to 4-byte aligned reads

 .../bindings/nvmem/layouts/fixed-cell.yaml         |  2 +-
 drivers/nvmem/core.c                               | 36 +++++++++++++++++-----
 drivers/nvmem/qfprom.c                             | 26 ++++++++++++----
 3 files changed, 49 insertions(+), 15 deletions(-)
---
base-commit: 253c82b3a2cec22bf9db65645f934fbe095899a3
change-id: 20241017-sar2130p-nvmem-5f856d99bbb7

Best regards,

Comments

Srinivas Kandagatla Feb. 18, 2025, 8:52 a.m. UTC | #1
On Mon, 17 Feb 2025 18:33:17 +0200, Dmitry Baryshkov wrote:
> Qualcomm SAR2130P is one of the platforms which require 4-byte reads
> when accessing the QFPROM data. Fix several omission in the NVMEM core,
> rework the QFPROM driver to use readl() instead of readb() and finally
> add compatible string for the QFPROM as present on the Qualcomm
> SAR2130P.
> 
> 
> [...]

Applied, thanks!

[1/5] dt-bindings: nvmem: fixed-cell: increase bits start value to 31
      commit: f5175dd69428ab517c8d68e772c4d287b6570d8e
[2/5] nvmem: core: fix bit offsets of more than one byte
      commit: d5d9e982a0886a1a99a1a8ef5320c57e257b4fb0
[3/5] nvmem: core: verify cell's raw_len
      commit: 11ccaa3121119eeff9ab9d537e0cf6be3b10698b
[4/5] nvmem: core: update raw_len if the bit reading is required
      commit: eca73df072715efb5e880514bb8395e0a4e74a59
[5/5] nvmem: qfprom: switch to 4-byte aligned reads
      commit: 4770132f37dbf327d25455d226e54fafbef6a5c4

Best regards,