From patchwork Thu Dec 12 18:51:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elliot Berman X-Patchwork-Id: 11289197 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B1D1F109A for ; Thu, 12 Dec 2019 18:52:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 90E6A2253D for ; Thu, 12 Dec 2019 18:52:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="KDxeMpNv"; dkim=pass (1024-bit key) header.d=amazonses.com header.i=@amazonses.com header.b="V50vGQlF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730449AbfLLSwX (ORCPT ); Thu, 12 Dec 2019 13:52:23 -0500 Received: from a27-11.smtp-out.us-west-2.amazonses.com ([54.240.27.11]:51078 "EHLO a27-11.smtp-out.us-west-2.amazonses.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730552AbfLLSvN (ORCPT ); Thu, 12 Dec 2019 13:51:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=zsmsymrwgfyinv5wlfyidntwsjeeldzt; d=codeaurora.org; t=1576176672; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; bh=w1SrKHHyeBDteMNP8O/IVD/2wQ7Wzg3QyRcWSjuUtGs=; b=KDxeMpNvKcAxS7hpxyrqFnqTmpbhNvIjSZV8yNz0PrGYfC4iCWxm1SxrxaDgiXL5 yZzp7sbLa0sXp2MxzNFFhanKaLk1mcH+DsvhcAzzVfi+ANNzsGd2cjBt6lqMOa+ybq0 zE6O+Q/2nWW1CljwChS5jLiM4DZLP1uptXGOkm3U= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=gdwg2y3kokkkj5a55z2ilkup5wp5hhxx; d=amazonses.com; t=1576176672; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:Feedback-ID; bh=w1SrKHHyeBDteMNP8O/IVD/2wQ7Wzg3QyRcWSjuUtGs=; b=V50vGQlFmtu7aY7Pm9CVUDFGfqdIIPIKUPO7wWImQXhGrIva9Kg8p8iJPofcMDzM K818HB16/c+va+tEDIKjWUNhDuzG4fDI5BdNNsLg8qnULg+XLOkVF5D8oAi1NSTN5qD gPJboxS1Wp/BzcYB+AlJlvxHJ10m3JlPMBj+svUI= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=ham autolearn_force=no version=3.4.0 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1BA2AC447A1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=eberman@codeaurora.org From: Elliot Berman To: bjorn.andersson@linaro.org, agross@kernel.org, swboyd@chromium.org Cc: Elliot Berman , saiprakash.ranjan@codeaurora.org, tsoni@codeaurora.org, sidgup@codeaurora.org, psodagud@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 08/17] firmware: qcom_scm-64: Improve SMC convention detection Date: Thu, 12 Dec 2019 18:51:12 +0000 Message-ID: <0101016efb735e6d-94821623-6253-48d9-992c-d268d6961791-000000@us-west-2.amazonses.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576176651-17089-1-git-send-email-eberman@codeaurora.org> References: <1576176651-17089-1-git-send-email-eberman@codeaurora.org> X-SES-Outgoing: 2019.12.12-54.240.27.11 Feedback-ID: 1.us-west-2.CZuq2qbDmUIuT3qdvXlRHZZCpfZqZ4GtG9v3VKgRyF0=:AmazonSES Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Improve the calling convention detection to use __qcom_scm_is_call_available() and not blindly assume 32-bit mode if the checks fails. BUG() if neither 32-bit or 64-bit mode works. Signed-off-by: Elliot Berman --- drivers/firmware/qcom_scm-64.c | 41 +++++++++++++++++++++++++++-------------- 1 file changed, 27 insertions(+), 14 deletions(-) diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index 3ae171a..6bc7f69 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -336,21 +336,34 @@ int __qcom_scm_ocmem_unlock(struct device *dev, uint32_t id, uint32_t offset, void __qcom_scm_init(void) { - u64 cmd; - struct arm_smccc_res res; - u32 fnid = SCM_SMC_FNID(QCOM_SCM_SVC_INFO, QCOM_SCM_INFO_IS_CALL_AVAIL); - - /* First try a SMC64 call */ - cmd = ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_64, - ARM_SMCCC_OWNER_SIP, fnid); - - arm_smccc_smc(cmd, QCOM_SCM_ARGS(1), cmd & (~BIT(ARM_SMCCC_TYPE_SHIFT)), - 0, 0, 0, 0, 0, &res); + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_INFO, + .cmd = QCOM_SCM_INFO_IS_CALL_AVAIL, + .args[0] = SCM_SMC_FNID(QCOM_SCM_SVC_INFO, + QCOM_SCM_INFO_IS_CALL_AVAIL) | + (ARM_SMCCC_OWNER_SIP << ARM_SMCCC_OWNER_SHIFT), + .arginfo = QCOM_SCM_ARGS(1), + .owner = ARM_SMCCC_OWNER_SIP, + }; + struct qcom_scm_res res; + int ret; - if (!res.a0 && res.a1) - qcom_smccc_convention = ARM_SMCCC_SMC_64; - else - qcom_smccc_convention = ARM_SMCCC_SMC_32; + qcom_smccc_convention = ARM_SMCCC_SMC_64; + // Device isn't required as there is only one argument - no device + // needed to dma_map_single to secure world + ret = qcom_scm_call_atomic(NULL, &desc, &res); + if (!ret && res.result[0] == 1) + goto out; + + qcom_smccc_convention = ARM_SMCCC_SMC_32; + ret = qcom_scm_call_atomic(NULL, &desc, &res); + if (!ret && res.result[0] == 1) + goto out; + + qcom_smccc_convention = -1; + BUG(); +out: + pr_info("QCOM SCM SMC Convention: %lld\n", qcom_smccc_convention); } bool __qcom_scm_pas_supported(struct device *dev, u32 peripheral)