From patchwork Sat Dec 7 23:35:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 3305291 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 51FECC0D4A for ; Sat, 7 Dec 2013 23:36:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6061820306 for ; Sat, 7 Dec 2013 23:36:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7685C202FE for ; Sat, 7 Dec 2013 23:36:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759123Ab3LGXgN (ORCPT ); Sat, 7 Dec 2013 18:36:13 -0500 Received: from mail-qc0-f181.google.com ([209.85.216.181]:58651 "EHLO mail-qc0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759144Ab3LGXgL (ORCPT ); Sat, 7 Dec 2013 18:36:11 -0500 Received: by mail-qc0-f181.google.com with SMTP id e9so1598764qcy.26 for ; Sat, 07 Dec 2013 15:36:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NBZsfvw3+yOM0jR/cUh/rCeQ5h3PG41i0voceYnMsT0=; b=Qo17MEM5rkHKy055h9NAy50rO9G8pjNyQFl+LSUlKCGN6Vb07EAZEC+qE/ia5LWMAU CiJDYvb/VNyB1Jr+PhjecIe1jq3PyLwPHJZLfPdTNFk7ZtEYveDVcfszzGeghv62732E VQHsrPoGJm98vYxewTlCNCm3dh1sB22cnyNHuq/sGXCTPIKclXcU3+vnnY4zcV8FMypQ cY32sWHLqNrEZAD6JiJ9bnkKJKsmMFLWKYGwbmKum2vjGY9hkP1DEZU2ItzSsA/nuS2o 3LTIyubyWtOWhQAzYc3MSomxmmyg/y4aCT+AlLbkYmIKN8PzMhnn+Nou/vDxXSQtJ/+e F7qQ== X-Received: by 10.224.151.79 with SMTP id b15mr16206995qaw.46.1386459370961; Sat, 07 Dec 2013 15:36:10 -0800 (PST) Received: from localhost (pool-108-20-244-90.bstnma.east.verizon.net. [108.20.244.90]) by mx.google.com with ESMTPSA id x10sm13476711qas.5.2013.12.07.15.36.09 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 07 Dec 2013 15:36:10 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, Rob Clark Subject: [PATCH 03/13] drm/msm: fix bus scaling Date: Sat, 7 Dec 2013 18:35:35 -0500 Message-Id: <1386459345-17731-4-git-send-email-robdclark@gmail.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1386459345-17731-1-git-send-email-robdclark@gmail.com> References: <1386459345-17731-1-git-send-email-robdclark@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This got a bit broken with original patches when re-arranging things to move dependencies on mach-msm inside #ifndef OF. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 11 +++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +++ drivers/gpu/drm/msm/msm_gpu.c | 20 +++++--------------- drivers/gpu/drm/msm/msm_gpu.h | 4 ++++ 4 files changed, 23 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c index 035bd13..d9e72a6 100644 --- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c @@ -414,6 +414,9 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) gpu->fast_rate = config->fast_rate; gpu->slow_rate = config->slow_rate; gpu->bus_freq = config->bus_freq; +#ifdef CONFIG_MSM_BUS_SCALING + gpu->bus_scale_table = config->bus_scale_table; +#endif DBG("fast_rate=%u, slow_rate=%u, bus_freq=%u", gpu->fast_rate, gpu->slow_rate, gpu->bus_freq); @@ -436,12 +439,17 @@ fail: * The a3xx device: */ +#if defined(CONFIG_MSM_BUS_SCALING) && !defined(CONFIG_OF) +# include +#endif + static int a3xx_probe(struct platform_device *pdev) { static struct adreno_platform_config config = {}; #ifdef CONFIG_OF /* TODO */ #else + struct kgsl_device_platform_data *pdata = pdev->dev.platform_data; uint32_t version = socinfo_get_version(); if (cpu_is_apq8064ab()) { config.fast_rate = 450000000; @@ -473,6 +481,9 @@ static int a3xx_probe(struct platform_device *pdev) config.rev = ADRENO_REV(3, 0, 5, 0); } +# ifdef CONFIG_MSM_BUS_SCALING + config.bus_scale_table = pdata->bus_scale_table; +# endif #endif pdev->dev.platform_data = &config; a3xx_pdev = pdev; diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index f73abfb..451b741 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -70,6 +70,9 @@ struct adreno_gpu { struct adreno_platform_config { struct adreno_rev rev; uint32_t fast_rate, slow_rate, bus_freq; +#ifdef CONFIG_MSM_BUS_SCALING + struct msm_bus_scale_pdata *bus_scale_table; +#endif }; #define ADRENO_IDLE_TIMEOUT (20 * 1000) diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 4583d61..71f105f 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -25,20 +25,10 @@ #ifdef CONFIG_MSM_BUS_SCALING #include -#include -static void bs_init(struct msm_gpu *gpu, struct platform_device *pdev) +static void bs_init(struct msm_gpu *gpu) { - struct drm_device *dev = gpu->dev; - struct kgsl_device_platform_data *pdata; - - if (!pdev) { - dev_err(dev->dev, "could not find dtv pdata\n"); - return; - } - - pdata = pdev->dev.platform_data; - if (pdata->bus_scale_table) { - gpu->bsc = msm_bus_scale_register_client(pdata->bus_scale_table); + if (gpu->bus_scale_table) { + gpu->bsc = msm_bus_scale_register_client(gpu->bus_scale_table); DBG("bus scale client: %08x", gpu->bsc); } } @@ -59,7 +49,7 @@ static void bs_set(struct msm_gpu *gpu, int idx) } } #else -static void bs_init(struct msm_gpu *gpu, struct platform_device *pdev) {} +static void bs_init(struct msm_gpu *gpu) {} static void bs_fini(struct msm_gpu *gpu) {} static void bs_set(struct msm_gpu *gpu, int idx) {} #endif @@ -452,7 +442,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, goto fail; } - bs_init(gpu, pdev); + bs_init(gpu); return 0; diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 8cd829e..08d0842 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -85,7 +85,11 @@ struct msm_gpu { struct regulator *gpu_reg, *gpu_cx; struct clk *ebi1_clk, *grp_clks[5]; uint32_t fast_rate, slow_rate, bus_freq; + +#ifdef CONFIG_MSM_BUS_SCALING + struct msm_bus_scale_pdata *bus_scale_table; uint32_t bsc; +#endif /* Hang Detction: */ #define DRM_MSM_HANGCHECK_PERIOD 500 /* in ms */