From patchwork Thu Jan 30 18:36:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kumar Gala X-Patchwork-Id: 3558681 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 395789F382 for ; Thu, 30 Jan 2014 18:38:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6481F201C0 for ; Thu, 30 Jan 2014 18:38:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 805EA201BF for ; Thu, 30 Jan 2014 18:37:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753593AbaA3ShK (ORCPT ); Thu, 30 Jan 2014 13:37:10 -0500 Received: from smtp.codeaurora.org ([198.145.11.231]:39502 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752064AbaA3ShJ (ORCPT ); Thu, 30 Jan 2014 13:37:09 -0500 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id C49E713EFFC; Thu, 30 Jan 2014 18:37:08 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id B6E1113F258; Thu, 30 Jan 2014 18:37:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from galak-ubuntu.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: galak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6FB8013EFFC; Thu, 30 Jan 2014 18:37:07 +0000 (UTC) From: Kumar Gala To: linux-arm-msm@vger.kernel.org Cc: Kumar Gala , Daniel Lezcano , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] clocksource: qcom: split building of legacy vs multiplatform support Date: Thu, 30 Jan 2014 12:36:41 -0600 Message-Id: <1391107002-21470-4-git-send-email-galak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1391107002-21470-1-git-send-email-galak@codeaurora.org> References: <1391107002-21470-1-git-send-email-galak@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The majority of the clocksource code for the Qualcomm platform is shared between newer (multiplatform) and older platforms. However there is a bit of code that isn't, so only build it for the appropriate config. Signed-off-by: Kumar Gala --- drivers/clocksource/qcom-timer.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c index dca829e..e807acf 100644 --- a/drivers/clocksource/qcom-timer.c +++ b/drivers/clocksource/qcom-timer.c @@ -106,15 +106,6 @@ static notrace cycle_t msm_read_timer_count(struct clocksource *cs) return readl_relaxed(source_base + TIMER_COUNT_VAL); } -static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) -{ - /* - * Shift timer count down by a constant due to unreliable lower bits - * on some targets. - */ - return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; -} - static struct clocksource msm_clocksource = { .name = "dg_timer", .rating = 300, @@ -228,7 +219,7 @@ err: sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz); } -#ifdef CONFIG_OF +#ifdef CONFIG_ARCH_QCOM static void __init msm_dt_timer_init(struct device_node *np) { u32 freq; @@ -281,7 +272,7 @@ static void __init msm_dt_timer_init(struct device_node *np) } CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); -#endif +#else static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, u32 sts) @@ -301,6 +292,15 @@ static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, return 0; } +static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) +{ + /* + * Shift timer count down by a constant due to unreliable lower bits + * on some targets. + */ + return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; +} + void __init msm7x01_timer_init(void) { struct clocksource *cs = &msm_clocksource; @@ -327,3 +327,4 @@ void __init qsd8x50_timer_init(void) return; msm_timer_init(19200000 / 4, 32, 7, false); } +#endif