From patchwork Fri Apr 4 18:45:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 3940411 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7369A9F1EE for ; Fri, 4 Apr 2014 19:00:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C3D232035D for ; Fri, 4 Apr 2014 19:00:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8C5AF20396 for ; Fri, 4 Apr 2014 19:00:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754119AbaDDS7w (ORCPT ); Fri, 4 Apr 2014 14:59:52 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:59318 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754005AbaDDSpl (ORCPT ); Fri, 4 Apr 2014 14:45:41 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 3AF7413F12D; Fri, 4 Apr 2014 18:45:41 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 2929313F129; Fri, 4 Apr 2014 18:45:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from sboyd-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8FF2E13F129; Fri, 4 Apr 2014 18:45:40 +0000 (UTC) From: Stephen Boyd To: Kumar Gala Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Brown , Saravana Kannan , Mike Turquette Subject: [PATCH 3/4] ARM: dts: qcom: Add GDSC nodes underneath clock controller Date: Fri, 4 Apr 2014 11:45:35 -0700 Message-Id: <1396637136-29974-4-git-send-email-sboyd@codeaurora.org> X-Mailer: git-send-email 1.9.0.1.gd5ccf8c In-Reply-To: <1396637136-29974-1-git-send-email-sboyd@codeaurora.org> References: <1396637136-29974-1-git-send-email-sboyd@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add nodes for the GDSCs present on the multimedia clock controller in 8974. Signed-off-by: Stephen Boyd --- arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 18 ++++++++++++++++++ arch/arm/boot/dts/qcom-msm8974.dtsi | 26 ++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index 13ac3e222495..478e89de0f38 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -3,4 +3,22 @@ / { model = "Qualcomm APQ8074 Dragonboard"; compatible = "qcom,apq8074-dragonboard", "qcom,apq8074"; + +}; + +&gdsc_venus { + qcom,skip-logic-collapse; + qcom,retain-periph; + qcom,retain-mem; +}; + +&gdsc_mdss { + qcom,skip-logic-collapse; + qcom,retain-periph; + qcom,retain-mem; +}; + +&gdsc_oxili_gx { + qcom,retain-mem; + qcom,retain-periph; }; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 9e5dadb101eb..e38ae30930b2 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -108,6 +108,32 @@ #clock-cells = <1>; #reset-cells = <1>; reg = <0xfd8c0000 0x6000>; + + regulators { + gdsc_venus: gdsc_venus { + regulator-name = "gdsc_venus"; + }; + + gdsc_mdss: gdsc_mdss { + regulator-name = "gdsc_mdss"; + }; + + gdsc_jpeg: gdsc_jpeg { + regulator-name = "gdsc_jpeg"; + }; + + gdsc_vfe: gdsc_vfe { + regulator-name = "gdsc_vfe"; + }; + + gdsc_oxili_gx: gdsc_oxili_gx { + regulator-name = "gdsc_oxili_gx"; + }; + + gdsc_oxili_cx: gdsc_oxili_cx { + regulator-name = "gdsc_oxili_cx"; + }; + }; }; serial@f991e000 {