From patchwork Thu Jun 12 19:13:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kumar Gala X-Patchwork-Id: 4344521 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 654E19F3B4 for ; Thu, 12 Jun 2014 19:14:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8E500200BE for ; Thu, 12 Jun 2014 19:14:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 080B02035D for ; Thu, 12 Jun 2014 19:14:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752203AbaFLTNc (ORCPT ); Thu, 12 Jun 2014 15:13:32 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:44200 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751010AbaFLTNb (ORCPT ); Thu, 12 Jun 2014 15:13:31 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id C21D513F378; Thu, 12 Jun 2014 19:13:30 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id B43D513F4B7; Thu, 12 Jun 2014 19:13:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from galak-ubuntu.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: galak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A09AA13F378; Thu, 12 Jun 2014 19:13:29 +0000 (UTC) From: Kumar Gala To: Tejun Heo , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell Cc: Kumar Gala , linux-ide@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] ata: qcom: Add device tree bindings information Date: Thu, 12 Jun 2014 14:13:24 -0500 Message-Id: <1402600404-19214-3-git-send-email-galak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1402600404-19214-1-git-send-email-galak@codeaurora.org> References: <1402600404-19214-1-git-send-email-galak@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add device tree binding for Qualcomm AHCI SATA controller and specifically the sata controller on the IPQ806x family of SoCs. Signed-off-by: Kumar Gala --- .../devicetree/bindings/ata/qcom-sata.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/qcom-sata.txt diff --git a/Documentation/devicetree/bindings/ata/qcom-sata.txt b/Documentation/devicetree/bindings/ata/qcom-sata.txt new file mode 100644 index 0000000..5e74e41 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/qcom-sata.txt @@ -0,0 +1,40 @@ +* Qualcomm AHCI SATA Controller + +SATA nodes are defined to describe on-chip Serial ATA controllers. +Each SATA controller should have its own node. + +Required properties: +- compatible : compatible list, contains "qcom,msm-ahci" +- interrupts : +- reg : +- phys : Must contain exactly one entry as specified + in phy-bindings.txt +- phy-names : Must be "sata-phy" + +Required properties for "qcom,ipq806x-ahci" compatible: +- clocks : Must contain an entry for each entry in clock-names. +- clock-names : Shall be: + "slave_iface" - Fabric port AHB clock for SATA + "iface" - AHB clock + "core" - core clock + "rxoob" - RX out-of-band clock + "pmalive" - Power Module Alive clock + +Example: + sata@29000000 { + compatible = "qcom,ipq806x-ahci", "qcom,msm-ahci"; + reg = <0x29000000 0x180>; + + interrupts = <0 209 0x0>; + + clocks = <&gcc SFAB_SATA_S_H_CLK>, + <&gcc SATA_H_CLK>, + <&gcc SATA_A_CLK>, + <&gcc SATA_RXOOB_CLK>, + <&gcc SATA_PMALIVE_CLK>; + clock-names = "slave_iface", "iface", "core", + "rxoob", "pmalive"; + + phys = <&sata_phy>; + phy-names = "sata-phy"; + };