[RFC,1/6] dt: qpnp: add binding description of Qualcomm QPNP PMICs

Commit Message

Stanimir Varbanov June 20, 2014, 12:21 p.m. UTC

From: Ivan T. Ivanov <[e-mail]>

Document the bindings used to describe the Qualcomm QPNP PMICs.

Suggested-by: Josh Cartwright <[e-mail]>
Signed-off-by: Ivan T. Ivanov <[e-mail]>
Signed-off-by: Stanimir Varbanov <[e-mail]>
---
 .../devicetree/bindings/qpnp/qcom,qpnp-spmi.txt    |   42 ++++++++++++++++++++
 1 files changed, 42 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/qpnp/qcom,qpnp-spmi.txt

\ No newline at end of file

Patch

diff --git a/Documentation/devicetree/bindings/qpnp/qcom,qpnp-spmi.txt b/Documentation/devicetree/bindings/qpnp/qcom,qpnp-spmi.txt
new file mode 100644
index 0000000..f657587
--- /dev/null
+++ b/Documentation/devicetree/bindings/qpnp/qcom,qpnp-spmi.txt
@@ -0,0 +1,42 @@ 
+Qualcomm QPNP partitioned PMIC multi-function device bindings
+
+QPNP is effectively a partitioning scheme for dividing the SPMI extended
+register space up into logical pieces, and set of fixed register
+locations/definitions within these regions, with some of these regions
+specifically used for interrupt handling.
+
+The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are
+interfaced to the chip via the SPMI (System Power Management Interface) bus.
+Support for multiple independent functions are implemented by splitting the
+16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
+each. A function can consume one or more of these fixed-size register regions.
+
+Required properties:
+- compatible:     Should contain "qcom,qpnp-spmi"
+- reg:            Specifies the SPMI USID slave address for this device.
+                  For more info see bindings/spmi/spmi.txt
+- #address-cells: Defines address cells for peripheral nodes - should be 1
+- #size-cells:    Defines size cells for peripheral nodes - should be 0
+
+Required properties for peripheral devices:
+- compatible:     Should constain "qcom,qpnp-xxx"
+- reg:            One or more 8bits peripheral ID
+
+Each child node represents a function of the QPNP.  Each child 'reg' entry
+describes a QPNP peripheral ID (number) within the USID slave address where
+the region starts.
+
+Example:
+
+	pm8941@0 {
+		compatible = "qcom,qpnp-spmi";
+		reg = <0x0 SPMI_USID>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		rtc@60 {
+			compatible = "qcom,qpnp-rtc";
+			reg = <0x60>, <0x61>;
+		};
+	};