From patchwork Thu Sep 4 22:35:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 4848561 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C068B9FC44 for ; Thu, 4 Sep 2014 22:36:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 03DCB20272 for ; Thu, 4 Sep 2014 22:36:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 408BD20279 for ; Thu, 4 Sep 2014 22:36:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756020AbaIDWgg (ORCPT ); Thu, 4 Sep 2014 18:36:36 -0400 Received: from mail-pa0-f42.google.com ([209.85.220.42]:44870 "EHLO mail-pa0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756018AbaIDWgf (ORCPT ); Thu, 4 Sep 2014 18:36:35 -0400 Received: by mail-pa0-f42.google.com with SMTP id lf10so21012647pab.29 for ; Thu, 04 Sep 2014 15:36:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cFRxX3PFzazoDtTtN7pj6T3I2Bvf1oBx2Qkrve8gjzs=; b=m4MzfQouOVnaiJVrUwsIfw4mnQ30WyRJa5I4fsckpjUS4JPsHyw9CHaSWm6/VQfmCd 0HwktsvAW5FZXJJuAJzOvlNcdbMt5UC71dGBXfUUGznB2SY0tVmMETLY7ZljvgqCPa+n 0TSDlQY6gVpFsQ2L51t3n/89sFE8c9We+jSzaYIS6OPWWLNgPyxu2R4NFJkeM9k4HkSN CTWIgFJvPIV7gxJp5Bj4A0BuvQ9N1ihB7MTmGEWudZpgf1tEX20LOUc1o1QYBr99TPbv GwT+s+hoBcmT8HOeJS0/ixe8P63YtHsoajsU9U7P/MxXgZjqHTTXExL7AvLGcOWNdch5 uc3g== X-Gm-Message-State: ALoCoQlxIX00qFgWZUsJGc74n2fqsTl+uvBq97peoFdog9bLVAEXA3q1tGbK5lrVt1ZMGEYawLEx X-Received: by 10.66.145.103 with SMTP id st7mr13112375pab.43.1409870194954; Thu, 04 Sep 2014 15:36:34 -0700 (PDT) Received: from ubuntu.localdomain (proxy6-global253.qualcomm.com. [199.106.103.253]) by mx.google.com with ESMTPSA id om6sm133722pdb.89.2014.09.04.15.36.33 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 04 Sep 2014 15:36:34 -0700 (PDT) From: Lina Iyer To: daniel.lezcano@linaro.org, lorenzo.pieralisi@arm.com, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org Cc: linux-pm@vger.kernel.org, msivasub@codeaurora.org, Lina Iyer Subject: [PATCH v5 7/7] arm: dts: qcom: Add idle states device nodes for 8974 Date: Thu, 4 Sep 2014 16:35:32 -0600 Message-Id: <1409870132-16929-8-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1409870132-16929-1-git-send-email-lina.iyer@linaro.org> References: <1409870132-16929-1-git-send-email-lina.iyer@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-8.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add allowable C-States for each cpu using the cpu-idle-states node. ARM spec dictates WFI as the default idle state at 0. Support standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer --- arch/arm/boot/dts/qcom-msm8974.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 0580bc2..041c8b6 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -21,6 +21,7 @@ reg = <0>; next-level-cache = <&L2>; qcom,acc = <&acc0>; + cpu-idle-states = <&CPU_WFI &CPU_SPC>; }; CPU1: cpu@1 { @@ -30,6 +31,7 @@ reg = <1>; next-level-cache = <&L2>; qcom,acc = <&acc1>; + cpu-idle-states = <&CPU_WFI &CPU_SPC>; }; CPU2: cpu@2 { @@ -39,6 +41,7 @@ reg = <2>; next-level-cache = <&L2>; qcom,acc = <&acc2>; + cpu-idle-states = <&CPU_WFI &CPU_SPC>; }; CPU3: cpu@3 { @@ -48,6 +51,7 @@ reg = <3>; next-level-cache = <&L2>; qcom,acc = <&acc3>; + cpu-idle-states = <&CPU_WFI &CPU_SPC>; }; L2: l2-cache { @@ -55,6 +59,22 @@ cache-level = <2>; qcom,saw = <&saw_l2>; }; + + idle-states { + CPU_WFI: cpu-idle-state-0 { + compatible = "qcom,idle-state-wfi", "arm,idle-state"; + entry-latency-us = <1>; + exit-latency-us = <1>; + min-residency-us = <2>; + }; + + CPU_SPC: cpu-idle-state-1 { + compatible = "qcom,idle-state-spc", "arm,idle-state"; + entry-latency-us = <150>; + exit-latency-us = <200>; + min-residency-us = <2000>; + }; + }; }; cpu-pmu {