From patchwork Mon Feb 23 07:55:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 5863081 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EFEB89F37F for ; Mon, 23 Feb 2015 07:57:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 141422062A for ; Mon, 23 Feb 2015 07:57:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2506C2062B for ; Mon, 23 Feb 2015 07:57:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752445AbbBWHzh (ORCPT ); Mon, 23 Feb 2015 02:55:37 -0500 Received: from mail-wg0-f50.google.com ([74.125.82.50]:51769 "EHLO mail-wg0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752440AbbBWHzd (ORCPT ); Mon, 23 Feb 2015 02:55:33 -0500 Received: by mail-wg0-f50.google.com with SMTP id l2so23872549wgh.9 for ; Sun, 22 Feb 2015 23:55:31 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Su1IwSuW6ZE/iNJG2JSJ0+Qri0Z9igkuQ217AS9SvMk=; b=kbOHp1MnmZQJ0NHvv+hn/TAweScPtyoMajCFsG68q3kVGU/Egh7YFrKViZFDxQV16u OwM2aMwlMYneG+d9WSEDAN3w7TUXqXKDUgk+fWTTsCBUdJJvtvu6OGcoUeL52U3YwFnO dbt+auWejJNf2/k9i9pTiv3PRAJN4AQill48oy0p4glY/xQ/o5SGFg/NA2sRM3izEtkr PjUINg8DmaQ89v5QMPOcqhH/VnrT/u2qO/S0Fjf+cHOzegyczSxz4/Jhubb9NACVeZbZ vFYrM2hxz4AzHbtWBCgcTI5aPJ+uszBF7wloSUH/QPpHzjCk8YFVbu1d1jCQBNMWkg9a HzjQ== X-Gm-Message-State: ALoCoQmfOCSgAZCvwwOvkFpmk7w8OFk4fjbRFiFZi1T0xhgUh8UkKfYpLIOAfQC4JOKLODeQMpwT X-Received: by 10.194.234.40 with SMTP id ub8mr19942353wjc.100.1424678131670; Sun, 22 Feb 2015 23:55:31 -0800 (PST) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-2-96-88-56.as13285.net. [2.96.88.56]) by mx.google.com with ESMTPSA id do1sm14692920wib.3.2015.02.22.23.55.29 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 22 Feb 2015 23:55:30 -0800 (PST) From: Srinivas Kandagatla To: Kumar Gala , linux-arm-msm@vger.kernel.org Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Russell King , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Clark , Srinivas Kandagatla Subject: [PATCH 05/12] ARM: dts: APQ8064: Add MDP support Date: Mon, 23 Feb 2015 07:55:27 +0000 Message-Id: <1424678127-13136-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <424678035-12862-1-git-send-email-srinivas.kandagatla@linaro.org> References: <424678035-12862-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rob Clark This patch adds MDP node to APQ8064 dt. Signed-off-by: Srinivas Kandagatla --- arch/arm/boot/dts/qcom-apq8064.dtsi | 112 ++++++++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index e65aff0..9c2e9b2 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1,6 +1,7 @@ /dts-v1/; #include "skeleton.dtsi" +#include #include #include #include @@ -94,6 +95,20 @@ }; }; + hdmi_pinctrl: hdmi-pinctrl { + mux1 { + pins = "gpio69", "gpio70", "gpio71"; + function = "hdmi"; + bias-pull-up; + drive-strength = <2>; + }; + mux2 { + pins = "gpio72"; + function = "hdmi"; + bias-pull-down; + drive-strength = <16>; + }; + }; ps_hold: ps_hold { mux { pins = "gpio78"; @@ -228,6 +243,18 @@ }; }; + ext_3p3v: regulator-fixed@1 { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "ext_3p3v"; + regulator-type = "voltage"; + startup-delay-us = <0>; + gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + qcom,ssbi@500000 { compatible = "qcom,ssbi"; reg = <0x00500000 0x1000>; @@ -426,6 +453,13 @@ reg = ; }; + pm8921_hdmi_mvs: pm8921-hdmi-mvs { + compatible = "qcom,rpm-pm8921-switch"; + reg = ; + regulator-always-on; + bias-pull-down; + }; + pm8921_l28: pm8921-l28 { compatible = "qcom,rpm-pm8921-nldo1200"; reg = ; @@ -704,5 +738,83 @@ pinctrl-0 = <&sdc4_gpios>; }; }; + + hdmi: qcom,hdmi-tx@4a00000 { + compatible = "qcom,hdmi-tx-8960"; + reg-names = "core_physical"; + reg = <0x04a00000 0x1000>; + interrupts = ; + clock-names = + "core_clk", + "master_iface_clk", + "slave_iface_clk"; + clocks = + <&mmcc HDMI_APP_CLK>, + <&mmcc HDMI_M_AHB_CLK>, + <&mmcc HDMI_S_AHB_CLK>; + qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70 + GPIO_ACTIVE_HIGH>; + qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71 + GPIO_ACTIVE_HIGH>; + qcom,hdmi-tx-hpd = <&tlmm_pinmux 72 + GPIO_ACTIVE_HIGH>; + core-vdda-supply = <&pm8921_hdmi_mvs>; + hdmi-mux-supply = <&ext_3p3v>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_pinctrl>; + }; + + gpu: qcom,adreno-3xx@4300000 { + compatible = "qcom,adreno-3xx"; + reg = <0x04300000 0x20000>; + reg-names = "kgsl_3d0_reg_memory"; + interrupts = ; + interrupt-names = "kgsl_3d0_irq"; + clock-names = + "core_clk", + "iface_clk", + "mem_clk", + "mem_iface_clk"; + clocks = + <&mmcc GFX3D_CLK>, + <&mmcc GFX3D_AHB_CLK>, + <&mmcc GFX3D_AXI_CLK>, + <&mmcc MMSS_IMEM_AHB_CLK>; + qcom,chipid = <0x03020002>; + qcom,gpu-pwrlevels { + compatible = "qcom,gpu-pwrlevels"; + qcom,gpu-pwrlevel@0 { + qcom,gpu-freq = <450000000>; + }; + qcom,gpu-pwrlevel@1 { + qcom,gpu-freq = <27000000>; + }; + }; + }; + + mdp: qcom,mdp@5100000 { + compatible = "qcom,mdp"; + reg = <0x05100000 0xf0000>; + interrupts = ; + connectors = <&hdmi>; + gpus = <&gpu>; + clock-names = + "core_clk", + "iface_clk", + "lut_clk", + "src_clk", + "hdmi_clk", + "mdp_clk", + "mdp_axi_clk"; + clocks = + <&mmcc MDP_CLK>, + <&mmcc MDP_AHB_CLK>, + <&mmcc MDP_LUT_CLK>, + <&mmcc TV_SRC>, + <&mmcc HDMI_TV_CLK>, + <&mmcc MDP_TV_CLK>, + <&mmcc MDP_AXI_CLK>; +// vdd-supply = <&footswitch_mdp>; + }; }; };