From patchwork Wed Mar 4 00:21:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kenneth Westfield X-Patchwork-Id: 5927401 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0B0CBBF440 for ; Wed, 4 Mar 2015 00:23:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3ABEE20320 for ; Wed, 4 Mar 2015 00:23:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9294E2043C for ; Wed, 4 Mar 2015 00:23:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757235AbbCDAXL (ORCPT ); Tue, 3 Mar 2015 19:23:11 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:56235 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932266AbbCDAWJ (ORCPT ); Tue, 3 Mar 2015 19:22:09 -0500 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 2209614006E; Wed, 4 Mar 2015 00:22:09 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 124A5140085; Wed, 4 Mar 2015 00:22:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: kwestfie@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id AC39A14006E; Wed, 4 Mar 2015 00:22:08 +0000 (UTC) From: Kenneth Westfield To: Mark Brown , Takashi Iwai , Liam Girdwood , Banajit Goswami , Patrick Lai , David Brown , Bryan Huntsman , Greg KH Cc: Kenneth Westfield , ALSA Mailing List , MSM Mailing List , Device Tree Mailing List , Kernel Mailing List Subject: [Patch V7 10/10] ARM: dts: Model IPQ LPASS audio hardware Date: Tue, 3 Mar 2015 16:21:59 -0800 Message-Id: <1425428519-12224-11-git-send-email-kwestfie@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1425428519-12224-1-git-send-email-kwestfie@codeaurora.org> References: <1425428519-12224-1-git-send-email-kwestfie@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kenneth Westfield Model the Qualcomm Technologies LPASS hardware for the ipq806x SOC. Signed-off-by: Kenneth Westfield Acked-by: Banajit Goswami --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index cb225dafe97cd83c9ae4cc19482ed55d4a71b8b3..8902d967463b3d9e6e02c6ec6518e392d8372050 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -2,6 +2,7 @@ #include "skeleton.dtsi" #include +#include #include / { @@ -96,6 +97,24 @@ cpu-offset = <0x80000>; }; + lpass@28100000 { + compatible = "qcom,lpass-cpu"; + status = "disabled"; + clocks = <&lcc AHBIX_CLK>, + <&lcc MI2S_OSR_CLK>, + <&lcc MI2S_BIT_CLK>; + clock-names = "ahbix-clk", + "mi2s-osr-clk", + "mi2s-bit-clk"; + interrupts = <0 85 1>; + interrupt-names = "lpass-irq-lpaif"; + reg = <0x28100000 0x10000>; + reg-names = "lpass-lpaif"; + qcom,adsp { + status = "disabled"; + }; + }; + acc0: clock-controller@2088000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02088000 0x1000>, <0x02008000 0x1000>; @@ -279,5 +298,12 @@ #clock-cells = <1>; #reset-cells = <1>; }; + + lcc: clock-controller@28000000 { + compatible = "qcom,lcc-ipq8064"; + reg = <0x28000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; }; };