From patchwork Tue Mar 17 05:46:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 6027381 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6C8B99F2A9 for ; Tue, 17 Mar 2015 05:47:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9A19F20459 for ; Tue, 17 Mar 2015 05:47:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 87D3B20458 for ; Tue, 17 Mar 2015 05:47:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751307AbbCQFqy (ORCPT ); Tue, 17 Mar 2015 01:46:54 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:36597 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751478AbbCQFqZ (ORCPT ); Tue, 17 Mar 2015 01:46:25 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 6F53714096A; Tue, 17 Mar 2015 05:46:24 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 5E0EE14096F; Tue, 17 Mar 2015 05:46:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: agross@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 90A4714096A; Tue, 17 Mar 2015 05:46:23 +0000 (UTC) From: Andy Gross To: Vinod Koul Cc: devicetree@vger.kernel.org, dmaengine@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kumar Gala , Bjorn Andersson , Andy Gross Subject: [Patch v6 1/2] dt/bindings: qcom_adm: Fix channel specifiers Date: Tue, 17 Mar 2015 00:46:11 -0500 Message-Id: <1426571172-9711-2-git-send-email-agross@codeaurora.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1426571172-9711-1-git-send-email-agross@codeaurora.org> References: <1426571172-9711-1-git-send-email-agross@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch removes the crci information from the dma channel property. At least one client device requires using more than one CRCI value for a channel. This does not match the current binding and the crci information needs to be removed. Instead, the client device will provide this information via other means. Signed-off-by: Andy Gross --- Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt b/Documentation/devicetree/bindings/dma/qcom_adm.txt index 9bcab91..38d45f8 100644 --- a/Documentation/devicetree/bindings/dma/qcom_adm.txt +++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt @@ -4,8 +4,7 @@ Required properties: - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 - reg: Address range for DMA registers - interrupts: Should contain one interrupt shared by all channels -- #dma-cells: must be <2>. First cell denotes the channel number. Second cell - denotes CRCI (client rate control interface) flow control assignment. +- #dma-cells: must be <1>. First cell denotes the channel number. - clocks: Should contain the core clock and interface clock. - clock-names: Must contain "core" for the core clock and "iface" for the interface clock. @@ -22,7 +21,7 @@ Example: compatible = "qcom,adm"; reg = <0x18300000 0x100000>; interrupts = <0 170 0>; - #dma-cells = <2>; + #dma-cells = <1>; clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; clock-names = "core", "iface"; @@ -35,15 +34,12 @@ Example: qcom,ee = <0>; }; -DMA clients must use the format descripted in the dma.txt file, using a three +DMA clients must use the format descripted in the dma.txt file, using a two cell specifier for each channel. -Each dmas request consists of 3 cells: +Each dmas request consists of two cells: 1. phandle pointing to the DMA controller 2. channel number - 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0. - The CRCI is used for flow control. It identifies the peripheral device that - is the source/destination for the transferred data. Example: @@ -56,7 +52,7 @@ Example: cs-gpios = <&qcom_pinmux 20 0>; - dmas = <&adm_dma 6 9>, - <&adm_dma 5 10>; + dmas = <&adm_dma 6>, + <&adm_dma 5>; dma-names = "rx", "tx"; };