From patchwork Wed Jul 22 07:11:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 6840401 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 450E39F38B for ; Wed, 22 Jul 2015 07:11:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 639A4206E8 for ; Wed, 22 Jul 2015 07:11:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7EFC820710 for ; Wed, 22 Jul 2015 07:11:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756017AbbGVHLp (ORCPT ); Wed, 22 Jul 2015 03:11:45 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:60337 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755889AbbGVHLo (ORCPT ); Wed, 22 Jul 2015 03:11:44 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id C8D45140D16; Wed, 22 Jul 2015 07:11:43 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id B8BD6140D20; Wed, 22 Jul 2015 07:11:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from blr-ubuntu-34.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5C7EF140D16; Wed, 22 Jul 2015 07:11:39 +0000 (UTC) From: Rajendra Nayak To: sboyd@codeaurora.org, mturquette@baylibre.com Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, georgi.djakov@linaro.org, svarbanov@mm-sol.com, srinivas.kandagatla@linaro.org, sviau@codeaurora.org, Rajendra Nayak Subject: [PATCH v6 04/13] clk: qcom: gdsc: Manage clocks with !CONFIG_PM Date: Wed, 22 Jul 2015 12:41:00 +0530 Message-Id: <1437549069-29655-5-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1437549069-29655-1-git-send-email-rnayak@codeaurora.org> References: <1437549069-29655-1-git-send-email-rnayak@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP With CONFIG_PM disabled, turn the devices clocks on during driver binding to the device, and turn them off when the driver is unbound from the device. Signed-off-by: Rajendra Nayak --- drivers/clk/qcom/gdsc.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index 3125809..9ddd2f8 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "gdsc.h" #define PWR_ON_MASK BIT(31) @@ -200,3 +201,61 @@ void gdsc_unregister(struct device *dev) { of_genpd_del_provider(dev->of_node); } + +#ifndef CONFIG_PM +static void enable_clock(struct device *dev, const char *con_id) +{ + struct clk *clk; + + clk = clk_get(dev, con_id); + if (!IS_ERR(clk)) { + clk_prepare_enable(clk); + clk_put(clk); + } +} + +static void disable_clock(struct device *dev, const char *con_id) +{ + struct clk *clk; + + clk = clk_get(dev, con_id); + if (!IS_ERR(clk)) { + clk_disable_unprepare(clk); + clk_put(clk); + } +} + +static int clk_notify(struct notifier_block *nb, unsigned long action, + void *data) +{ + int sz; + struct device *dev = data; + char **con_id, *con_ids[] = { "core", "iface", NULL }; + + if (!of_find_property(dev->of_node, "power-domains", &sz)) + return 0; + + switch (action) { + case BUS_NOTIFY_BIND_DRIVER: + for (con_id = con_ids; *con_id; con_id++) + enable_clock(dev, *con_id); + break; + case BUS_NOTIFY_UNBOUND_DRIVER: + for (con_id = con_ids; *con_id; con_id++) + disable_clock(dev, *con_id); + break; + } + return 0; +} + +struct notifier_block nb = { + .notifier_call = clk_notify, +}; + +int qcom_pm_runtime_init(void) +{ + bus_register_notifier(&platform_bus_type, &nb); + return 0; +} +core_initcall(qcom_pm_runtime_init); +#endif