From patchwork Fri Feb 12 20:50:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 8297451 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B3A869FC53 for ; Fri, 12 Feb 2016 20:51:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D8B2020454 for ; Fri, 12 Feb 2016 20:51:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 90C562045B for ; Fri, 12 Feb 2016 20:51:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750853AbcBLUvu (ORCPT ); Fri, 12 Feb 2016 15:51:50 -0500 Received: from mail-pf0-f169.google.com ([209.85.192.169]:34966 "EHLO mail-pf0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750926AbcBLUvt (ORCPT ); Fri, 12 Feb 2016 15:51:49 -0500 Received: by mail-pf0-f169.google.com with SMTP id c10so53777248pfc.2 for ; Fri, 12 Feb 2016 12:51:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KmgNWWGecQJTt9CN3qZbL9WS4kKV7egtWSWiVd+x1m8=; b=eOAnlyQYVlPCT7aUVjVfPWaDmm8xk6LNDJl0lYW2j4JeGWE0uYBF8Y93N+vIYZ6XEA x09EVTTPfYYPo4j95MjB/6OQdbT9nT8BsK7radaEFZhWkctgv2DDiCcwCK5wQHBWteLr X9C14VSjQBiMr3z7VPIdqKIRM7ULshzH6DMBE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KmgNWWGecQJTt9CN3qZbL9WS4kKV7egtWSWiVd+x1m8=; b=LsEJ35mLZ6TehmvIpn7FNa/StmMwbcChLV9ksTH2Sy0and9wVaG+PhXQKZZlT2L9cq x5xdQ2k0C4u0a5zZwzSR65Xe/S5jKdvPJzvqTYQ5+QoY/UfTcKN32EvBV3nZtacI8Doh 3mgBnWdAU+tpiz3zGEzl/UaVDz1LfhKMCxU5k1+kfR5MIYUpg0Y9WzgSGfp/vysd0xUL 16WFUcQOjlMbrCBhYbztebayfcZCJ1hPcuFJ8Ai/opM060GSPlqEd7CFXl0vnQuzJTAQ dshgAapZDl5L+GQcsA5LFCRtfpm60rdSCnXhUSj1nOT3ss/2r2bSKC/zgX36GsZuzbMy frWw== X-Gm-Message-State: AG10YOTlgTmm4LZyjV2tCRjwf9DPXNP2UdNlSHTIYwcrZz6adk6QEzjHzItQqvChFvrhxSTL X-Received: by 10.98.69.78 with SMTP id s75mr5161873pfa.102.1455310309052; Fri, 12 Feb 2016 12:51:49 -0800 (PST) Received: from ubuntu.localdomain ([172.56.8.98]) by smtp.gmail.com with ESMTPSA id x12sm21401070pfi.88.2016.02.12.12.51.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 12 Feb 2016 12:51:47 -0800 (PST) From: Lina Iyer To: ulf.hansson@linaro.org, khilman@kernel.org, rjw@rjwysocki.net, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: geert@linux-m68k.org, k.kozlowski@samsung.com, msivasub@codeaurora.org, agross@codeaurora.org, sboyd@codeaurora.org, linux-arm-msm@vger.kernel.org, lorenzo.pieralisi@arm.com, ahaslam@baylibre.com, mtitinger@baylibre.com, Lina Iyer , Subject: [RFC v2 12/12] ARM64: dts: Define CPU power domain for MSM8916 Date: Fri, 12 Feb 2016 13:50:38 -0700 Message-Id: <1455310238-8963-13-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1455310238-8963-1-git-send-email-lina.iyer@linaro.org> References: <1455310238-8963-1-git-send-email-lina.iyer@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Define power domain and the power states for the domain as defined by the PSCI firmware. The 8916 firmware supports OS initiated method of powering off the CPU clusters. Cc: Signed-off-by: Lina Iyer --- Changes since RFC v1 - - no cpu-map topology node arch/arm64/boot/dts/qcom/msm8916.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index b7839a8..62dade8 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -63,6 +63,7 @@ reg = <0x0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; + power-domains = <&CPU_PD>; }; CPU1: cpu@1 { @@ -71,6 +72,7 @@ reg = <0x1>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; + power-domains = <&CPU_PD>; }; CPU2: cpu@2 { @@ -79,6 +81,7 @@ reg = <0x2>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; + power-domains = <&CPU_PD>; }; CPU3: cpu@3 { @@ -87,6 +90,7 @@ reg = <0x3>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; + power-domains = <&CPU_PD>; }; idle-states { @@ -101,6 +105,27 @@ }; }; + CPU_PD: cpu-pd@0 { + #power-domain-cells = <0>; + power-states = <&CLUSTER_RET>, <&CLUSTER_PWR_DWN>; + }; + + pd-power-states { + CLUSTER_RET: power-state@1 { + state-param = <0x1000010>; + entry-latency-us = <500>; + exit-latency-us = <500>; + residency-us = <2000>; + }; + + CLUSTER_PWR_DWN: power-state@2 { + state-param = <0x1000030>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + residency-us = <6000>; + }; + }; + psci { compatible = "arm,psci-1.0"; method = "smc";