From patchwork Fri Jun 3 23:25:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 9154331 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 486B960751 for ; Fri, 3 Jun 2016 23:29:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1EB6728334 for ; Fri, 3 Jun 2016 23:29:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 139E828345; Fri, 3 Jun 2016 23:29:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 97A3528334 for ; Fri, 3 Jun 2016 23:29:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751503AbcFCX2x (ORCPT ); Fri, 3 Jun 2016 19:28:53 -0400 Received: from mail-oi0-f47.google.com ([209.85.218.47]:33670 "EHLO mail-oi0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750727AbcFCXZp (ORCPT ); Fri, 3 Jun 2016 19:25:45 -0400 Received: by mail-oi0-f47.google.com with SMTP id k23so150083155oih.0 for ; Fri, 03 Jun 2016 16:25:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XAybwf1WmW4zJeCCl+VGnKX76e7X0ZmbDBdPotrZIzk=; b=iIN0YLjTJohYDvO5SQBPsoJICnewBdcQvyGPXF21SHC0bSiX7VbMduA6fjkjA0IpPJ qVkND6SlCF2I8D3e1lFUMP0LkX1nSzOUHMZuC5Jt/SB2MBcq8yQXaVHUgBRNXikaBiud 3pZBBIQR+ZXQgh+6jkBac1MSSVNoDeGbO1JP8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XAybwf1WmW4zJeCCl+VGnKX76e7X0ZmbDBdPotrZIzk=; b=PHj3xn8Hy+Q3fctUa9innJCbhSzmgOIZDT2vBf4BkpXV6opDPq4QLruLdr9BUYYMSD 3kuQehHjzwDcJi5spxE+WgQXxtiGoyVVflv7CfJ6kdl79mq/qTZZFiHqNzn9d0qc3Ms8 ibKUrrMLBKwuhxbTuos/nB/kRh5Tc7ddPBSmtHHMYxE9dJkGYnLC7G+v+FpHhqzQKTwC FAPynkTuPBBU9id1UVSbgg4rDBDdwt0COifHozkgdIV9WgENF41bKXiAT5MNSbkiVCNL vChbmvYDBkj771LB6hP3FP+Xd2h0p15JlPoBPGnGnrUDzwS1Q8sT2yWLjAu4SlmZzGiv +4QA== X-Gm-Message-State: ALyK8tJw0mphnzkMiEqmeps9DOJmTkTIbM3HoYfIiBhXIU3lxw8nizj34G+WT6BYw2HGZwNw X-Received: by 10.157.46.177 with SMTP id w46mr3053560ota.181.1464996344758; Fri, 03 Jun 2016 16:25:44 -0700 (PDT) Received: from localhost ([2602:306:c558:19b0:a575:d8f4:7700:e330]) by smtp.gmail.com with ESMTPSA id 92sm4374004otw.16.2016.06.03.16.25.44 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 03 Jun 2016 16:25:44 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bjorn Andersson , Stephen Boyd , devicetree@vger.kernel.org, jilai wang , Andy Gross Subject: [Patch v6 01/10] dt/bindings: firmware: Add Qualcomm SCM binding Date: Fri, 3 Jun 2016 18:25:21 -0500 Message-Id: <1464996330-16952-2-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464996330-16952-1-git-send-email-andy.gross@linaro.org> References: <1464996330-16952-1-git-send-email-andy.gross@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the device tree support for the Qualcomm SCM firmware. Signed-off-by: Andy Gross Reviewed-by: Stephen Boyd Acked-by: Bjorn Andersson Acked-by: Rob Herring --- .../devicetree/bindings/firmware/qcom,scm.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt new file mode 100644 index 0000000..3b4436e --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -0,0 +1,28 @@ +QCOM Secure Channel Manager (SCM) + +Qualcomm processors include an interface to communicate to the secure firmware. +This interface allows for clients to request different types of actions. These +can include CPU power up/down, HDCP requests, loading of firmware, and other +assorted actions. + +Required properties: +- compatible: must contain one of the following: + * "qcom,scm-apq8064" for APQ8064 platforms + * "qcom,scm-msm8660" for MSM8660 platforms + * "qcom,scm-msm8690" for MSM8690 platforms + * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc) +- clocks: One to three clocks may be required based on compatible. + * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960" + * Core, iface, and bus clocks required for "qcom,scm" +- clock-names: Must contain "core" for the core clock, "iface" for the interface + clock and "bus" for the bus clock per the requirements of the compatible. + +Example for MSM8916: + + firmware { + scm { + compatible = "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + };