From patchwork Fri Jul 1 14:27:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Covington X-Patchwork-Id: 9209959 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1C8E160752 for ; Fri, 1 Jul 2016 14:27:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F025286BD for ; Fri, 1 Jul 2016 14:27:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0413E286C2; Fri, 1 Jul 2016 14:27:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 831FE286BD for ; Fri, 1 Jul 2016 14:27:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752689AbcGAO1d (ORCPT ); Fri, 1 Jul 2016 10:27:33 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:46526 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752436AbcGAO1c (ORCPT ); Fri, 1 Jul 2016 10:27:32 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B296461375; Fri, 1 Jul 2016 14:27:31 +0000 (UTC) Received: from illium.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: cov@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 78F716120F; Fri, 1 Jul 2016 14:27:29 +0000 (UTC) From: Christopher Covington To: Andy Gross , Arnd Bergmann , linux-arm-msm@vger.kernel.org, Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: pelcan@codeaurora.org, timur@codeaurora.org, okaya@codeaurora.org, Christopher Covington Subject: [PATCH v2] arm64: defconfig: Enable QDF2432 config options Date: Fri, 1 Jul 2016 10:27:17 -0400 Message-Id: <1467383237-11005-1-git-send-email-cov@codeaurora.org> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1467382327-9726-1-git-send-email-cov@codeaurora.org> References: <1467382327-9726-1-git-send-email-cov@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now that ACPI is on in the defconfig, the time seems right to enable drivers for the SD/MMC, DMA, and pin control hardware described in the ACPI tables of the QDF2432 server platform. Signed-off-by: Christopher Covington --- v2: Remove unrelated script changes. --- arch/arm64/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index fd2d74d..c138425 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -186,6 +186,7 @@ CONFIG_SPI_SPIDEV=m CONFIG_SPMI=y CONFIG_PINCTRL_SINGLE=y CONFIG_PINCTRL_MSM8916=y +CONFIG_PINCTRL_QDF2XXX=m CONFIG_PINCTRL_QCOM_SPMI_PMIC=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_DWAPB=y @@ -245,6 +246,7 @@ CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_ARMMMCI=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ACPI=m CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_OF_ESDHC=y CONFIG_MMC_SDHCI_TEGRA=y @@ -272,6 +274,8 @@ CONFIG_DMADEVICES=y CONFIG_PL330_DMA=y CONFIG_TEGRA20_APB_DMA=y CONFIG_QCOM_BAM_DMA=y +CONFIG_QCOM_HIDMA_MGMT=m +CONFIG_QCOM_HIDMA=m CONFIG_RCAR_DMAC=y CONFIG_VFIO=y CONFIG_VFIO_PCI=y