From patchwork Tue Oct 18 07:25:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 9381441 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3A8A160487 for ; Tue, 18 Oct 2016 07:25:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C59C28BDC for ; Tue, 18 Oct 2016 07:25:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1C59D29155; Tue, 18 Oct 2016 07:25:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 86B3728BDC for ; Tue, 18 Oct 2016 07:25:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758598AbcJRHZl (ORCPT ); Tue, 18 Oct 2016 03:25:41 -0400 Received: from mail-lf0-f53.google.com ([209.85.215.53]:34589 "EHLO mail-lf0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755072AbcJRHZl (ORCPT ); Tue, 18 Oct 2016 03:25:41 -0400 Received: by mail-lf0-f53.google.com with SMTP id b81so329017870lfe.1 for ; Tue, 18 Oct 2016 00:25:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=IVNrpNnBrYmMrFoiB6NvTKtZTBT4Z16zY/7dHgO1sT0=; b=MiRzTmXLEAkoKYkiAUreiPJip5bj2m8+R9lvtppbfw7XlEdcbTAmEQNvB3WHWLRr/e GCfiZeAg46t4iqasSbWJFrlVNZ2Zj9yfQn24DdviBhljosdSi+vGYeKquEjVgAjWoOIq PhH6W+AZlJxbZsdoYWHdmSO8qYjF7PEdnXAAo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=IVNrpNnBrYmMrFoiB6NvTKtZTBT4Z16zY/7dHgO1sT0=; b=mnriF7XQ5AZORsjaIk0koEe+DptSSHPPoeF3bV9uxc/Q/a3sJrJNib0a2PpCt86ztE /qcFYP8Muar3XurYbUPZG9Dwk/jbzhkau/HRD6bPeDyqgVnwLhgzg93tbK9o6+LeqRDX lJ7GP97qc7csslpaltyRwEf7ewncfrlovlojt2b2QvPQZEFgy56dkKF1Mc4JOoV/1j3k 9b/pUblq546AZJfu2jf0r7TCGoEaCKF/o82Gp1egMEd9wdywHR1eSo2SRXW8hJcPCLRX NMLC7N6xH0d+lzkXUM7+QKRbVrWSQzPVlIpC2Y+kdnfe/qOynp/UT5SeybYi+q0aSSyn RjQQ== X-Gm-Message-State: AA6/9RkBH8VccAZMfQJwEL467WHMOUbliNsIJQp4+uTyF+6rfPm6GhmoxxkqeYdvqzfaG/hC X-Received: by 10.25.39.15 with SMTP id n15mr19389992lfn.91.1476775537543; Tue, 18 Oct 2016 00:25:37 -0700 (PDT) Received: from linuslaptop.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id f23sm8819952lji.12.2016.10.18.00.25.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Oct 2016 00:25:36 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Andy Gross Cc: Stephen Boyd , Bjorn Andersson , David Brown , Linus Walleij Subject: [PATCH 1/2] ARM: dts: add EBI2 to the Qualcomm MSM8660 DTSI Date: Tue, 18 Oct 2016 09:25:34 +0200 Message-Id: <1476775534-4493-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the external bus interface EBI2 to the MSM8660 device tree, albeit with status = "disabled" so that devices actually using EBI2 can turn it on if needed. Signed-off-by: Linus Walleij --- ChangeLog v3->v4: - Rebase on kernel v4.9-rc1 - Bindings and driver are merged so should be clear to apply. ChangeLog v2->v3: - Use the new #address-cells = <2> for indicating the CS in the first address cell - Use the ranges property properly for defining the six different CS address windows - Define CS3 to properly map over 128MB - The EBI2 bindings are now ACKed by Rob Herring and a pull request to ARM SoC for both binding and driver is pending. - This should be safe to merge for v4.9 --- arch/arm/boot/dts/qcom-msm8660.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 8c65e0d82559..0b6348544598 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -141,6 +141,23 @@ }; }; + ebi2@1a100000 { + compatible = "qcom,msm8660-ebi2"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0x0 0x1a800000 0x00800000>, + <1 0x0 0x1b000000 0x00800000>, + <2 0x0 0x1b800000 0x00800000>, + <3 0x0 0x1d000000 0x08000000>, + <4 0x0 0x1c800000 0x00800000>, + <5 0x0 0x1c000000 0x00800000>; + reg = <0x1a100000 0x1000>, <0x1a110000 0x1000>; + reg-names = "ebi2", "xmem"; + clocks = <&gcc EBI2_2X_CLK>, <&gcc EBI2_CLK>; + clock-names = "ebi2x", "ebi2"; + status = "disabled"; + }; + qcom,ssbi@500000 { compatible = "qcom,ssbi"; reg = <0x500000 0x1000>;