| Message ID | 1479259165-1601-3-git-send-email-spjoshi@codeaurora.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Andy Gross |
| Headers | show |
On 11/15, Sarangdhar Joshi wrote: > Core, iface and bus clocks are not required to be voted from SCM > driver for some of the Qualcomm chipsets. Remove dependency on > these clocks from driver. > > Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> > --- Applied to clk-fixes
On Tue 15 Nov 17:19 PST 2016, Sarangdhar Joshi wrote: > Core, iface and bus clocks are not required to be voted from SCM > driver for some of the Qualcomm chipsets. Remove dependency on > these clocks from driver. > > Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> > --- > drivers/firmware/qcom_scm.c | 49 ++++++++++++++++++++++++++++++++++----------- > 1 file changed, 37 insertions(+), 12 deletions(-) > > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c > index d79fecd..ddf7c8b 100644 > --- a/drivers/firmware/qcom_scm.c > +++ b/drivers/firmware/qcom_scm.c > @@ -28,6 +28,10 @@ > > #include "qcom_scm.h" > > +#define SCM_HAS_CORE_CLK BIT(0) > +#define SCM_HAS_IFACE_CLK BIT(1) > +#define SCM_HAS_BUS_CLK BIT(2) > + > struct qcom_scm { > struct device *dev; > struct clk *core_clk; > @@ -380,32 +384,40 @@ EXPORT_SYMBOL(qcom_scm_is_available); > static int qcom_scm_probe(struct platform_device *pdev) > { > struct qcom_scm *scm; > + unsigned long clks; > int ret; > > scm = devm_kzalloc(&pdev->dev, sizeof(*scm), GFP_KERNEL); > if (!scm) > return -ENOMEM; > > - scm->core_clk = devm_clk_get(&pdev->dev, "core"); > - if (IS_ERR(scm->core_clk)) { > - if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER) > - return PTR_ERR(scm->core_clk); > + clks = (unsigned long)of_device_get_match_data(&pdev->dev); > + if (clks & SCM_HAS_CORE_CLK) { > + scm->core_clk = devm_clk_get(&pdev->dev, "core"); > + if (IS_ERR(scm->core_clk)) { > + if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER) > + return PTR_ERR(scm->core_clk); > > - scm->core_clk = NULL; > + scm->core_clk = NULL; > + } > } > > - if (of_device_is_compatible(pdev->dev.of_node, "qcom,scm")) { > + if (clks & SCM_HAS_IFACE_CLK) { > scm->iface_clk = devm_clk_get(&pdev->dev, "iface"); > if (IS_ERR(scm->iface_clk)) { > if (PTR_ERR(scm->iface_clk) != -EPROBE_DEFER) > - dev_err(&pdev->dev, "failed to acquire iface clk\n"); > + dev_err(&pdev->dev, > + "failed to acquire iface clk\n"); > return PTR_ERR(scm->iface_clk); > } > + } > > + if (clks & SCM_HAS_BUS_CLK) { > scm->bus_clk = devm_clk_get(&pdev->dev, "bus"); > if (IS_ERR(scm->bus_clk)) { > if (PTR_ERR(scm->bus_clk) != -EPROBE_DEFER) > - dev_err(&pdev->dev, "failed to acquire bus clk\n"); > + dev_err(&pdev->dev, > + "failed to acquire bus clk\n"); > return PTR_ERR(scm->bus_clk); > } > } > @@ -429,10 +441,23 @@ static int qcom_scm_probe(struct platform_device *pdev) > } > > static const struct of_device_id qcom_scm_dt_match[] = { > - { .compatible = "qcom,scm-apq8064",}, > - { .compatible = "qcom,scm-msm8660",}, > - { .compatible = "qcom,scm-msm8960",}, > - { .compatible = "qcom,scm",}, > + { .compatible = "qcom,scm-apq8064", > + .data = (void *) SCM_HAS_CORE_CLK, > + }, > + { .compatible = "qcom,scm-msm8660", > + .data = (void *) SCM_HAS_CORE_CLK, > + }, > + { .compatible = "qcom,scm-msm8960", > + .data = (void *) SCM_HAS_CORE_CLK, > + }, > + { .compatible = "qcom,scm-msm8996", > + .data = NULL, /* no clocks */ > + }, > + { .compatible = "qcom,scm", > + .data = (void *)(SCM_HAS_CORE_CLK > + | SCM_HAS_IFACE_CLK > + | SCM_HAS_BUS_CLK), > + }, > {} > }; > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project > -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index d79fecd..ddf7c8b 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -28,6 +28,10 @@ #include "qcom_scm.h" +#define SCM_HAS_CORE_CLK BIT(0) +#define SCM_HAS_IFACE_CLK BIT(1) +#define SCM_HAS_BUS_CLK BIT(2) + struct qcom_scm { struct device *dev; struct clk *core_clk; @@ -380,32 +384,40 @@ EXPORT_SYMBOL(qcom_scm_is_available); static int qcom_scm_probe(struct platform_device *pdev) { struct qcom_scm *scm; + unsigned long clks; int ret; scm = devm_kzalloc(&pdev->dev, sizeof(*scm), GFP_KERNEL); if (!scm) return -ENOMEM; - scm->core_clk = devm_clk_get(&pdev->dev, "core"); - if (IS_ERR(scm->core_clk)) { - if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER) - return PTR_ERR(scm->core_clk); + clks = (unsigned long)of_device_get_match_data(&pdev->dev); + if (clks & SCM_HAS_CORE_CLK) { + scm->core_clk = devm_clk_get(&pdev->dev, "core"); + if (IS_ERR(scm->core_clk)) { + if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER) + return PTR_ERR(scm->core_clk); - scm->core_clk = NULL; + scm->core_clk = NULL; + } } - if (of_device_is_compatible(pdev->dev.of_node, "qcom,scm")) { + if (clks & SCM_HAS_IFACE_CLK) { scm->iface_clk = devm_clk_get(&pdev->dev, "iface"); if (IS_ERR(scm->iface_clk)) { if (PTR_ERR(scm->iface_clk) != -EPROBE_DEFER) - dev_err(&pdev->dev, "failed to acquire iface clk\n"); + dev_err(&pdev->dev, + "failed to acquire iface clk\n"); return PTR_ERR(scm->iface_clk); } + } + if (clks & SCM_HAS_BUS_CLK) { scm->bus_clk = devm_clk_get(&pdev->dev, "bus"); if (IS_ERR(scm->bus_clk)) { if (PTR_ERR(scm->bus_clk) != -EPROBE_DEFER) - dev_err(&pdev->dev, "failed to acquire bus clk\n"); + dev_err(&pdev->dev, + "failed to acquire bus clk\n"); return PTR_ERR(scm->bus_clk); } } @@ -429,10 +441,23 @@ static int qcom_scm_probe(struct platform_device *pdev) } static const struct of_device_id qcom_scm_dt_match[] = { - { .compatible = "qcom,scm-apq8064",}, - { .compatible = "qcom,scm-msm8660",}, - { .compatible = "qcom,scm-msm8960",}, - { .compatible = "qcom,scm",}, + { .compatible = "qcom,scm-apq8064", + .data = (void *) SCM_HAS_CORE_CLK, + }, + { .compatible = "qcom,scm-msm8660", + .data = (void *) SCM_HAS_CORE_CLK, + }, + { .compatible = "qcom,scm-msm8960", + .data = (void *) SCM_HAS_CORE_CLK, + }, + { .compatible = "qcom,scm-msm8996", + .data = NULL, /* no clocks */ + }, + { .compatible = "qcom,scm", + .data = (void *)(SCM_HAS_CORE_CLK + | SCM_HAS_IFACE_CLK + | SCM_HAS_BUS_CLK), + }, {} };
Core, iface and bus clocks are not required to be voted from SCM driver for some of the Qualcomm chipsets. Remove dependency on these clocks from driver. Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org> --- drivers/firmware/qcom_scm.c | 49 ++++++++++++++++++++++++++++++++++----------- 1 file changed, 37 insertions(+), 12 deletions(-)