From patchwork Wed Nov 16 17:01:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dwivedi, Avaneesh Kumar (avani)" X-Patchwork-Id: 9432209 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8497660476 for ; Wed, 16 Nov 2016 17:02:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 70B8628FCB for ; Wed, 16 Nov 2016 17:02:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 63DFE28FCE; Wed, 16 Nov 2016 17:02:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF9E428F71 for ; Wed, 16 Nov 2016 17:02:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932592AbcKPRCB (ORCPT ); Wed, 16 Nov 2016 12:02:01 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:57230 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932811AbcKPRB5 (ORCPT ); Wed, 16 Nov 2016 12:01:57 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7B5F4614FB; Wed, 16 Nov 2016 17:01:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1479315716; bh=zI0k58KIHRmp9o1Ork9chbgbEh7yV3UHLaiJeULUUaI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j9NLMZS4FYnwxQy6Q5SKoebtDWI1+a8YIGwVAsebOpOnGFBPnNa9dsKTjskxslliC +9pklxntOptbCAVQpUdPG9y5ZD1O+XgwfE90c9YRCGIA+xMNLm0BZTdfek19jxVqYi PQ6CTDCyLzQxSRP5SiZQ0x6N19P+Eb6R5pjPS5FU= Received: from akdwived-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akdwived@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 13B28614A2; Wed, 16 Nov 2016 17:01:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1479315716; bh=zI0k58KIHRmp9o1Ork9chbgbEh7yV3UHLaiJeULUUaI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j9NLMZS4FYnwxQy6Q5SKoebtDWI1+a8YIGwVAsebOpOnGFBPnNa9dsKTjskxslliC +9pklxntOptbCAVQpUdPG9y5ZD1O+XgwfE90c9YRCGIA+xMNLm0BZTdfek19jxVqYi PQ6CTDCyLzQxSRP5SiZQ0x6N19P+Eb6R5pjPS5FU= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 13B28614A2 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=akdwived@codeaurora.org From: Avaneesh Kumar Dwivedi To: bjorn.andersson@linaro.org Cc: sboyd@codeaurora.org, agross@codeaurora.org, linux-arm-msm@vger.kernel.org, Avaneesh Kumar Dwivedi Subject: [PATCH v4 03/10] remoteproc: qcom: Initialize clock and regulator handle with private data Date: Wed, 16 Nov 2016 22:31:29 +0530 Message-Id: <1479315696-15490-4-git-send-email-akdwived@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1479315696-15490-1-git-send-email-akdwived@codeaurora.org> References: <1479315696-15490-1-git-send-email-akdwived@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Clock and voltage regulator voting is needed before we take hexagon out of reset. Certain regulators and clocks need voting by rproc on behalf of hexagon only during restart operation but certain clocks and voltage need to be voted till hexagon is up, these regulators and clocks are identified as proxy and active resource whose handle is being obtained by supplying private proxy and active regulator and clock string. Signed-off-by: Avaneesh Kumar Dwivedi --- drivers/remoteproc/qcom_q6v5_pil.c | 148 +++++++++++++++++++++++++++---------- 1 file changed, 109 insertions(+), 39 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c index f43c96b..32e4bbc 100644 --- a/drivers/remoteproc/qcom_q6v5_pil.c +++ b/drivers/remoteproc/qcom_q6v5_pil.c @@ -132,6 +132,14 @@ struct q6v5 { struct clk *ahb_clk; struct clk *axi_clk; struct clk *rom_clk; + struct clk **active_clks; + struct clk **proxy_clks; + struct reg_info *active_regs; + struct reg_info *proxy_regs; + int active_reg_count; + int proxy_reg_count; + int active_clk_count; + int proxy_clk_count; struct completion start_done; struct completion stop_done; @@ -154,27 +162,48 @@ enum { Q6V5_SUPPLY_PLL, }; -static int q6v5_regulator_init(struct q6v5 *qproc) +static int q6v5_regulator_init(struct device *dev, + struct reg_info **regs_ref, char **reg_str, int volatage_load[][2]) { - int ret; + int reg_count = 0, i; + struct reg_info *regs; - qproc->supply[Q6V5_SUPPLY_CX].supply = "cx"; - qproc->supply[Q6V5_SUPPLY_MX].supply = "mx"; - qproc->supply[Q6V5_SUPPLY_MSS].supply = "mss"; - qproc->supply[Q6V5_SUPPLY_PLL].supply = "pll"; + if (!reg_str) + return 0; - ret = devm_regulator_bulk_get(qproc->dev, - ARRAY_SIZE(qproc->supply), qproc->supply); - if (ret < 0) { - dev_err(qproc->dev, "failed to get supplies\n"); - return ret; - } + while (reg_str[reg_count] != NULL) + reg_count++; - regulator_set_load(qproc->supply[Q6V5_SUPPLY_CX].consumer, 100000); - regulator_set_load(qproc->supply[Q6V5_SUPPLY_MSS].consumer, 100000); - regulator_set_load(qproc->supply[Q6V5_SUPPLY_PLL].consumer, 10000); + if (!reg_count) + return reg_count; - return 0; + regs = devm_kzalloc(dev, sizeof(struct reg_info) * reg_count, + GFP_KERNEL); + + if (!regs) + return -ENOMEM; + + for (i = 0; i < reg_count; i++) { + const char *reg_name; + + reg_name = reg_str[i]; + regs[i].reg = devm_regulator_get(dev, reg_name); + if (IS_ERR(regs[i].reg)) { + + int rc = PTR_ERR(regs[i].reg); + + if (rc != -EPROBE_DEFER) + dev_err(dev, "Failed to get %s\n regulator", + reg_name); + return rc; + } + + regs[i].uV = volatage_load[i][0]; + regs[i].uA = volatage_load[i][1]; + } + + *regs_ref = regs; + return reg_count; } static int q6v5_regulator_enable(struct q6v5 *qproc) @@ -719,27 +748,45 @@ static int q6v5_init_mem(struct q6v5 *qproc, struct platform_device *pdev) return 0; } -static int q6v5_init_clocks(struct q6v5 *qproc) +static int q6v5_init_clocks(struct device *dev, struct clk ***clks_ref, + char **clk_str) { - qproc->ahb_clk = devm_clk_get(qproc->dev, "iface"); - if (IS_ERR(qproc->ahb_clk)) { - dev_err(qproc->dev, "failed to get iface clock\n"); - return PTR_ERR(qproc->ahb_clk); - } + int clk_count = 0, i; + struct clk **clks; - qproc->axi_clk = devm_clk_get(qproc->dev, "bus"); - if (IS_ERR(qproc->axi_clk)) { - dev_err(qproc->dev, "failed to get bus clock\n"); - return PTR_ERR(qproc->axi_clk); - } + if (!clk_str) + return 0; + + while (clk_str[clk_count] != NULL) + clk_count++; + + if (!clk_count) + return clk_count; + + clks = devm_kzalloc(dev, sizeof(struct clk *) * clk_count, + GFP_KERNEL); + if (!clks) + return -ENOMEM; + + for (i = 0; i < clk_count; i++) { + const char *clock_name; + + clock_name = clk_str[i]; + clks[i] = devm_clk_get(dev, clock_name); + if (IS_ERR(clks[i])) { + + int rc = PTR_ERR(clks[i]); + + if (rc != -EPROBE_DEFER) + dev_err(dev, "Failed to get %s clock\n", + clock_name); + return rc; + } - qproc->rom_clk = devm_clk_get(qproc->dev, "mem"); - if (IS_ERR(qproc->rom_clk)) { - dev_err(qproc->dev, "failed to get mem clock\n"); - return PTR_ERR(qproc->rom_clk); } - return 0; + *clks_ref = clks; + return clk_count; } static int q6v5_init_reset(void *q, void *p) @@ -845,7 +892,7 @@ static int q6v5_probe(struct platform_device *pdev) struct q6v5 *qproc; struct rproc *rproc; const struct q6_rproc_res *desc; - int ret; + int ret, count; desc = of_device_get_match_data(&pdev->dev); if (!desc) @@ -876,17 +923,40 @@ static int q6v5_probe(struct platform_device *pdev) if (ret) goto free_rproc; - ret = q6v5_init_clocks(qproc); - if (ret) - goto free_rproc; + count = q6v5_init_clocks(&pdev->dev, &qproc->proxy_clks, + desc->proxy_clk_string); + if (count < 0) { + dev_err(&pdev->dev, "Failed to setup proxy clocks.\n"); + return count; + } + qproc->proxy_clk_count = count; - ret = q6v5_regulator_init(qproc); - if (ret) - goto free_rproc; + count = q6v5_init_clocks(&pdev->dev, &qproc->active_clks, + desc->active_clk_string); + if (count < 0) { + dev_err(&pdev->dev, "Failed to setup active clocks.\n"); + return count; + } + qproc->active_clk_count = count; ret = desc->q6_reset_init(qproc, pdev); if (ret) goto free_rproc; + count = q6v5_regulator_init(&pdev->dev, &qproc->proxy_regs, + desc->proxy_reg_string, (int (*)[2])desc->proxy_voltage_load); + if (count < 0) { + dev_err(&pdev->dev, "Failed to setup active regulators.\n"); + return count; + } + qproc->proxy_reg_count = count; + + count = q6v5_regulator_init(&pdev->dev, &qproc->active_regs, + desc->active_reg_string, (int (*)[2])desc->active_voltage_load); + if (count < 0) { + dev_err(&pdev->dev, "Failed to setup proxy regulators.\n"); + return count; + } + qproc->active_reg_count = count; ret = q6v5_request_irq(qproc, pdev, "wdog", q6v5_wdog_interrupt); if (ret < 0)