From patchwork Tue Nov 29 10:50:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dwivedi, Avaneesh Kumar (avani)" X-Patchwork-Id: 9451465 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 62DE560710 for ; Tue, 29 Nov 2016 10:51:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6994D27F10 for ; Tue, 29 Nov 2016 10:51:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5C3BA2811E; Tue, 29 Nov 2016 10:51:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C0C7D27F10 for ; Tue, 29 Nov 2016 10:51:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756133AbcK2KvH (ORCPT ); Tue, 29 Nov 2016 05:51:07 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:56598 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755531AbcK2KvH (ORCPT ); Tue, 29 Nov 2016 05:51:07 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 690296145E; Tue, 29 Nov 2016 10:51:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1480416666; bh=69xsy3YlaW1gmPQW70cULrDH3gnD5/MOebiR5tR64bc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oxu3OJqC0j7Z3ZqDs46lVn/0UPfK0FnkssCmNCumjJDDxB+LO0X05rU0M6D9ROXvM VH+OJu9DiaCcLd8q1RMD2ljU+E+8/nT5mE0+DTc2GD6l0MaeQTwX0D+/o1WbSPPGs3 a20dsNwsgCldDqy+tw89O0P7tWqTuHsxZQzH2v8s= Received: from akdwived-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akdwived@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 72FE061400; Tue, 29 Nov 2016 10:51:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1480416665; bh=69xsy3YlaW1gmPQW70cULrDH3gnD5/MOebiR5tR64bc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aLQDhyVRyPU1CmHz+oCsDRGFlVgv+aUuNT3ZGbdWFQcQ+MfNYJXiogXj/fbDqyLVt rICbNg1fVDkKf8DhbFtCCN+iv98wtgZG9gEYveok7EdCOrtDN5U9LiHbW2wLkfbCwq sYXTWz0wREXrUpQMkrJLdA47gDqepnVR4UHTSieQ= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 72FE061400 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=akdwived@codeaurora.org From: Avaneesh Kumar Dwivedi To: bjorn.andersson@linaro.org Cc: sboyd@codeaurora.org, stanimir.varbanov@linaro.org, agross@codeaurora.org, linux-arm-msm@vger.kernel.org, Avaneesh Kumar Dwivedi Subject: [RESEND PATCH v2] remoteproc: qcom: Add venus rproc support on msm8996 platform. Date: Tue, 29 Nov 2016 16:20:47 +0530 Message-Id: <1480416647-3518-2-git-send-email-akdwived@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1480416647-3518-1-git-send-email-akdwived@codeaurora.org> References: <1480416647-3518-1-git-send-email-akdwived@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch is based on https://patchwork.kernel.org/patch/9415627/ https://patchwork.kernel.org/patch/9415651/ This patch add clock initialization, enable and disable support. Required resource name string and rating are differentiated based on compatible string. Also added documentation for venus pil on msm8996. Signed-off-by: Avaneesh Kumar Dwivedi --- .../devicetree/bindings/remoteproc/qcom,venus.txt | 26 ++++- drivers/remoteproc/qcom_venus_pil.c | 116 ++++++++++++++++++++- 2 files changed, 140 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,venus.txt b/Documentation/devicetree/bindings/remoteproc/qcom,venus.txt index 2d73ba1..417026b 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,venus.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,venus.txt @@ -6,13 +6,30 @@ on the Qualcomm Venus remote processor core. - compatible: Usage: required Value type: - Definition: must contain "qcom,venus-pil" + Definition: must contain "qcom,venus-pil" or + "qcom,venus-msm8996-pil" - memory-region: Usage: required Value type: Definition: a phandle to a node describing reserved memory +- clocks: + Usage: required + Value type: + Definition: reference to the core, iface and bus and maxi clocks to be held on + behalf of the booting of the venus core + +- clock-names: + Usage: required + Value type: + Definition: should be "core_clk", "iface_clk", "bus_clk", "maxi_clk" + +- power-domains: + Usage: required + Value type: + Definition: reference to the venus gdsc to be turned on before booting venus core + * An example reserved-memory { #address-cells = <2>; @@ -29,5 +46,12 @@ on the Qualcomm Venus remote processor core. rproc_venus@0 { compatible = "qcom,venus-pil"; + clocks = <&mmcc VIDEO_CORE_CLK>, + <&mmcc VIDEO_AHB_CLK>, + <&mmcc VIDEO_AXI_CLK>, + <&mmcc VIDEO_MAXI_CLK>; + + clock-names = "core_clk", "iface_clk", "bus_clk", "maxi_clk"; + power-domains = <&mmcc VENUS_GDSC>; memory-region = <&venus_mem>; }; diff --git a/drivers/remoteproc/qcom_venus_pil.c b/drivers/remoteproc/qcom_venus_pil.c index 6d4e55b..f91f873 100644 --- a/drivers/remoteproc/qcom_venus_pil.c +++ b/drivers/remoteproc/qcom_venus_pil.c @@ -19,8 +19,10 @@ #include #include #include +#include #include #include +#include #include "qcom_mdt_loader.h" #include "remoteproc_internal.h" @@ -30,6 +32,11 @@ #define VENUS_PAS_ID 9 #define VENUS_FW_MEM_SIZE SZ_8M +struct venus_rproc_res { + char **venus_clks; + int venus_clk_rate[4]; +}; + struct qcom_venus { struct device *dev; struct rproc *rproc; @@ -37,6 +44,8 @@ struct qcom_venus { phys_addr_t mem_phys; void *mem_va; size_t mem_size; + struct clk *venus_clks[4]; + int clk_count; }; static int venus_load(struct rproc *rproc, const struct firmware *fw) @@ -78,11 +87,49 @@ static int venus_load(struct rproc *rproc, const struct firmware *fw) .load = venus_load, }; +static int qcom_venus_clk_enable(struct device *dev, struct clk **clks, + int clk_count) +{ + int rc = 0; + int i; + + for (i = 0; i < clk_count; i++) { + rc = clk_prepare_enable(clks[i]); + if (rc) { + dev_err(dev, "Clock enable failed\n"); + goto err; + } + } + + return 0; +err: + for (i--; i >= 0; i--) + clk_disable_unprepare(clks[i]); + + return rc; +} + +static void qcom_venus_clk_disable(struct qcom_venus *venus) +{ + int i; + struct clk **clks = venus->venus_clks; + + for (i = 0; i < venus->clk_count; i++) + clk_disable_unprepare(clks[i]); +} + static int venus_start(struct rproc *rproc) { struct qcom_venus *venus = rproc->priv; int ret; + ret = qcom_venus_clk_enable(venus->dev, venus->venus_clks, + venus->clk_count); + if (ret) { + dev_err(venus->dev, "failed to enable venus_clk\n"); + return ret; + } + ret = qcom_scm_pas_auth_and_reset(VENUS_PAS_ID); if (ret) dev_err(venus->dev, @@ -101,6 +148,8 @@ static int venus_stop(struct rproc *rproc) if (ret) dev_err(venus->dev, "failed to shutdown: %d\n", ret); + qcom_venus_clk_disable(venus); + return ret; } @@ -123,13 +172,58 @@ static void *venus_da_to_va(struct rproc *rproc, u64 da, int len) .da_to_va = venus_da_to_va, }; +static int qcom_venus_init_clocks(struct device *dev, struct clk **clks, + char **clk_str, const int *rate) +{ + int clk_count = 0, i; + + if (!clk_str) + return 0; + + while (clk_str[clk_count] != NULL) + clk_count++; + + if (!clk_count) + return clk_count; + + if (!clks) + return -ENOMEM; + + for (i = 0; i < clk_count; i++) { + const char *clock_name; + + clock_name = clk_str[i]; + clks[i] = devm_clk_get(dev, clock_name); + if (IS_ERR(clks[i])) { + + int rc = PTR_ERR(clks[i]); + + if (rc != -EPROBE_DEFER) + dev_err(dev, "Failed to get %s clock\n", + clock_name); + return rc; + } + clk_set_rate(clks[i], clk_round_rate(clks[i], rate[i])); + + } + + return clk_count; +} + + + static int venus_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct qcom_venus *venus; struct rproc *rproc; + const struct venus_rproc_res *desc; int ret; + desc = of_device_get_match_data(&pdev->dev); + if (!desc) + return -EINVAL; + if (!qcom_scm_is_available()) return -EPROBE_DEFER; @@ -158,6 +252,14 @@ static int venus_probe(struct platform_device *pdev) platform_set_drvdata(pdev, venus); + ret = qcom_venus_init_clocks(&pdev->dev, venus->venus_clks, + desc->venus_clks, desc->venus_clk_rate); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to setup venus clocks.\n"); + return ret; + } + venus->clk_count = ret; + venus->mem_va = dma_alloc_coherent(dev, venus->mem_size, &venus->mem_phys, GFP_KERNEL); if (!venus->mem_va) { @@ -194,8 +296,20 @@ static int venus_remove(struct platform_device *pdev) return 0; } +static const struct venus_rproc_res venus_msm8996_res = { + .venus_clks = (char*[]){"core_clk", "iface_clk", "bus_clk", + "maxi_clk", NULL}, + .venus_clk_rate = {19200000, 19200000, 19200000, 80000000}, +}; + +static const struct venus_rproc_res venus_8916_res = { + .venus_clks = NULL, + .venus_clk_rate = {0}, +}; + static const struct of_device_id venus_of_match[] = { - { .compatible = "qcom,venus-pil" }, + { .compatible = "qcom,venus-msm8996-pil", .data = &venus_msm8996_res }, + { .compatible = "qcom,venus-pil", .data = &venus_8916_res}, { }, };