From patchwork Wed Dec 28 11:06:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ritesh Harjani X-Patchwork-Id: 9490195 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 313BB62AB0 for ; Wed, 28 Dec 2016 11:08:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1D4C61FE6A for ; Wed, 28 Dec 2016 11:08:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 11DFD2623D; Wed, 28 Dec 2016 11:08:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 434381FE6A for ; Wed, 28 Dec 2016 11:08:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751528AbcL1LHo (ORCPT ); Wed, 28 Dec 2016 06:07:44 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:38696 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751524AbcL1LHm (ORCPT ); Wed, 28 Dec 2016 06:07:42 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 8D563613B2; Wed, 28 Dec 2016 11:07:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1482923261; bh=8VntaPRQbLjQggU1tPvUahAGGcG2vQq+2t+Z7GKr+7Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hmcOBT3tEim77fcKur+vmE21s/KfYoTtZBsbSJin4OKf5aQwRJ6lzyx64HAcB3vaZ 0YJCFUAaOb1YVUUam5JfB0q4J4IKCRAj+7MKghmkCcyvIP83H7fZvQI/+6ZTx+er0I VVDl/bENpD6RvtuhFT+up3zXcwEpWuvPP1+hziss= Received: from rharjani-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: riteshh@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3D991613AB; Wed, 28 Dec 2016 11:07:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1482923260; bh=8VntaPRQbLjQggU1tPvUahAGGcG2vQq+2t+Z7GKr+7Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XFvovmFbsZqYk/8YVMAWsBUmb1srk1vT/2BIYKxAlWZ3xvRDE8rD6vtpPNmPHuvr9 HJh7GZcAvqMAyZAgS8IEUwBpkZj5RTmweaJjtY1CUwSV2wInx2PHRclIzn2eV0obuT PV2eKbEWW176Mxk8rXsfrbozi03UXESgDJwjR7jk= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 3D991613AB Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=riteshh@codeaurora.org From: Ritesh Harjani To: ulf.hansson@linaro.org, adrian.hunter@intel.com Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, shawn.lin@rock-chips.com, stummala@codeaurora.org, georgi.djakov@linaro.org, linux-arm-msm@vger.kernel.org, pramod.gurav@linaro.org, jeremymc@redhat.com, venkatg@codeaurora.org, asutoshd@codeaurora.org, subhashj@codeaurora.org, Ritesh Harjani Subject: [PATCH 7/8] mmc: sdhci-msm: Make HS400 tuning follow as per recommeneded HW sequence Date: Wed, 28 Dec 2016 16:36:30 +0530 Message-Id: <1482923191-17362-8-git-send-email-riteshh@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1482923191-17362-1-git-send-email-riteshh@codeaurora.org> References: <1482923191-17362-1-git-send-email-riteshh@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP During tuning execution for HS400 mode, HW sequence recommends to select MCLK_SEL/2(0x3) in VENDOR_SPEC & sdhc msm clock at GCC to be 400MHZ (nearest supported clk). Add this change in tuning sequence during HS400 tuning. Signed-off-by: Ritesh Harjani --- drivers/mmc/host/sdhci-msm.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 84d29dd..fa9bce3 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -151,7 +151,8 @@ static unsigned int msm_get_clock_rate_for_bus_mode(struct sdhci_host *host, */ if (ios.timing == MMC_TIMING_UHS_DDR50 || ios.timing == MMC_TIMING_MMC_DDR52 || - ios.timing == MMC_TIMING_MMC_HS400) + ios.timing == MMC_TIMING_MMC_HS400 || + host->flags & SDHCI_HS400_TUNING) clock *= 2; return clock; } @@ -611,7 +612,8 @@ void sdhci_msm_hc_select_mode(struct sdhci_host *host) { struct mmc_ios ios = host->mmc->ios; - if (ios.timing == MMC_TIMING_MMC_HS400) + if (ios.timing == MMC_TIMING_MMC_HS400 || + host->flags & SDHCI_HS400_TUNING) msm_hc_select_hs400(host); else msm_hc_select_default(host); @@ -831,6 +833,16 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode) ios.timing == MMC_TIMING_UHS_SDR104)) return 0; + /* + * For HS400 tuning in HS200 timing requires: + * - select MCLK/2 in VENDOR_SPEC + * - program MCLK to 400MHz (or nearest supported) in GCC + */ + if (host->flags & SDHCI_HS400_TUNING) { + sdhci_msm_hc_select_mode(host); + msm_set_clock_rate_for_bus_mode(host, ios.clock); + } + retry: /* First of all reset the tuning block */ rc = msm_init_cm_dll(host);