From patchwork Tue Jan 10 06:41:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ritesh Harjani X-Patchwork-Id: 9506479 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 20F52601E9 for ; Tue, 10 Jan 2017 06:42:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 16F5D27FB6 for ; Tue, 10 Jan 2017 06:42:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0BFF5281E1; Tue, 10 Jan 2017 06:42:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9904C27FBB for ; Tue, 10 Jan 2017 06:42:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757068AbdAJGmp (ORCPT ); Tue, 10 Jan 2017 01:42:45 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:41668 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757041AbdAJGmn (ORCPT ); Tue, 10 Jan 2017 01:42:43 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 261416145B; Tue, 10 Jan 2017 06:42:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1484030557; bh=3NlfdGP0CV9EEjCDxjqJgpsqMUE6PFz+pt4OAnpLJAA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M1pqbSeuNvYT7y8cY6klCocynavUK4rjG7m0u6IJZCYJAZILYpbvTsM8J05S5EMDx LhNwg/xNVuVsvWrs/QYEASbRZZZ8S7lVDnCTWcVi4IPBnfEQvLgdiBVYq/WWzBvaYH 1sBgClM52Bee7uanbJN9fbffw7q85pSibdc+gAGI= Received: from rharjani-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: riteshh@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 32ED06141B; Tue, 10 Jan 2017 06:42:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1484030556; bh=3NlfdGP0CV9EEjCDxjqJgpsqMUE6PFz+pt4OAnpLJAA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CBqSeUxgnspu1sKRQ/lGsDriG8edPxSfekvMcDXu9D250m4V1Yb7Pqht7WvYIWzji tW0dYxXysyzZWEIO1fTEadzzuGacOCP3NMI5MExxyy+5ziY6lPRPUdSMkSuu4Jti6D 3tiopKwpxlwDlxg4vuaegFbOf32IcA6ZiUNe/sA4= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 32ED06141B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=riteshh@codeaurora.org From: Ritesh Harjani To: adrian.hunter@intel.com, ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, shawn.lin@rock-chips.com, linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org, asutoshd@codeaurora.org, stummala@codeaurora.org, venkatg@codeaurora.org, pramod.gurav@linaro.org, jeremymc@redhat.com, Ritesh Harjani Subject: [RESEND RFC 2/3] mmc: sdhci-msm: Implement platform_dumpregs callback in sdhci-msm Date: Tue, 10 Jan 2017 12:11:54 +0530 Message-Id: <1484030515-16722-3-git-send-email-riteshh@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1484030515-16722-1-git-send-email-riteshh@codeaurora.org> References: <1484030515-16722-1-git-send-email-riteshh@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sahitya Tummala Implement ->platform_dumpregs host operation to print the platform specific registers in addition to standard SDHC register during error conditions. Signed-off-by: Sahitya Tummala Signed-off-by: Ritesh Harjani --- drivers/mmc/host/sdhci-msm.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 32879b8..1241dbd 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -29,6 +29,11 @@ #define CORE_VERSION_MAJOR_MASK (0xf << CORE_VERSION_MAJOR_SHIFT) #define CORE_VERSION_MINOR_MASK 0xff +#define CORE_MCI_DATA_CNT 0x30 +#define CORE_MCI_STATUS 0x34 +#define CORE_MCI_FIFO_CNT 0x44 +#define CORE_MCI_STATUS2 0x6c + #define CORE_HC_MODE 0x78 #define HC_MODE_EN 0x1 #define CORE_POWER 0x0 @@ -77,6 +82,10 @@ #define CORE_HC_SELECT_IN_HS400 (6 << 19) #define CORE_HC_SELECT_IN_MASK (7 << 19) +#define CORE_VENDOR_SPEC_FUNC2 0x110 +#define CORE_VENDOR_SPEC_ADMA_ERR_ADDR0 0x114 +#define CORE_VENDOR_SPEC_ADMA_ERR_ADDR1 0x118 + #define CORE_CSR_CDC_CTLR_CFG0 0x130 #define CORE_SW_TRIG_FULL_CALIB BIT(16) #define CORE_HW_AUTOCAL_ENA BIT(17) @@ -658,6 +667,30 @@ static int sdhci_msm_hs400_dll_calibration(struct sdhci_host *host) return ret; } +static void sdhci_msm_dumpregs(struct sdhci_host *host) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); + + pr_err("----------- PLATFORM REGISTER DUMP -----------\n"); + + pr_err("Data cnt: 0x%08x | Fifo cnt: 0x%08x | Int sts: 0x%08x | Int sts2: 0x%08x\n", + readl_relaxed(msm_host->core_mem + CORE_MCI_DATA_CNT), + readl_relaxed(msm_host->core_mem + CORE_MCI_FIFO_CNT), + readl_relaxed(msm_host->core_mem + CORE_MCI_STATUS), + readl_relaxed(msm_host->core_mem + CORE_MCI_STATUS2)); + pr_err("DLL cfg: 0x%08x | DLL sts: 0x%08x | SDCC ver: 0x%08x\n", + readl_relaxed(host->ioaddr + CORE_DLL_CONFIG), + readl_relaxed(host->ioaddr + CORE_DLL_STATUS), + readl_relaxed(msm_host->core_mem + CORE_MCI_VERSION)); + pr_err("Vndr func: 0x%08x | Vndr adma err : addr0: 0x%08x addr1: 0x%08x\n", + readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC), + readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC_ADMA_ERR_ADDR0), + readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC_ADMA_ERR_ADDR1)); + pr_err("Vndr func2: 0x%08x\n", + readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC_FUNC2)); +} + static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode) { int tuning_seq_cnt = 3; @@ -1035,6 +1068,7 @@ static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) .set_bus_width = sdhci_set_bus_width, .set_uhs_signaling = sdhci_msm_set_uhs_signaling, .voltage_switch = sdhci_msm_voltage_switch, + .platform_dumpregs = sdhci_msm_dumpregs, }; static const struct sdhci_pltfm_data sdhci_msm_pdata = {