From patchwork Tue Jan 17 05:56:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 9520013 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7A72360244 for ; Tue, 17 Jan 2017 05:57:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 685CF2846C for ; Tue, 17 Jan 2017 05:57:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 597422849B; Tue, 17 Jan 2017 05:57:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF4282846C for ; Tue, 17 Jan 2017 05:57:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750770AbdAQF5H (ORCPT ); Tue, 17 Jan 2017 00:57:07 -0500 Received: from mail-ot0-f180.google.com ([74.125.82.180]:35715 "EHLO mail-ot0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750834AbdAQF5G (ORCPT ); Tue, 17 Jan 2017 00:57:06 -0500 Received: by mail-ot0-f180.google.com with SMTP id 65so56812063otq.2 for ; Mon, 16 Jan 2017 21:56:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=li5ihu2tQ/6LFyaVendypECelIfqx5aripCUB3h/heI=; b=cQGP52gwHnn1I/wIEFFOYRvYX/ogLfrg103YMJgfaI99p4jiKrTV5znjp7OYS8Kxz0 LDNgcLE+prNGbUmebKngdTUzG+46NnfugN5HP+dBCFwQeKjnTAurC7+e66l/jeDNkJGW Z6gO9UCpNFyoWWlgTpq+5uMUsahG1zfiihs1s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=li5ihu2tQ/6LFyaVendypECelIfqx5aripCUB3h/heI=; b=rOk4vrYRp6yiYzJ6VYPgEkzE07irh7SobAgQrR6u6pml3hRCLgRLDyVygLpjLsGKDS i3opBbcOBXFj8GHo9QGpj58seFI8/QUVi2CQwKbr9UdF8fphENOlpk9RX9W/ZRK5e5rc mHluYgtOnBUFWEq3+jXEdn+DQGx6VGOx/tY8XRPRLmCc5dj55OwAnSbHS6a0W8enq2PH CRMMKxQ8pyTOPTazXPy7HwPFkoAclxwPVCgFH7DpduJhmresCwKpxw8ai4mHWHbm/I+r ZeUwkMsKE8kU2pc8iksrIPew+Nf98YJPJuhOa0R11jJOj7n5yM12rjUBrNZgeHiU79TS 0P+g== X-Gm-Message-State: AIkVDXLN/56Wboa/jKIe6sbk5j4xqnaGmp8XwoKoNUMqlTSXgDuNSH5MUdMRQ74y1tnBIJNg X-Received: by 10.157.27.169 with SMTP id z38mr2732535otd.262.1484632600341; Mon, 16 Jan 2017 21:56:40 -0800 (PST) Received: from localhost ([2602:306:3406:6500:dde:1c2e:c6cc:26f9]) by smtp.gmail.com with ESMTPSA id t53sm2473626otd.6.2017.01.16.21.56.38 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Mon, 16 Jan 2017 21:56:39 -0800 (PST) From: Andy Gross To: freedreno@lists.freedesktop.org Cc: jcrouse@codeaurora.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, stanimir.varbanov@linaro.org, Andy Gross Subject: [PATCH] firmware: qcom_scm: Add set remote state API Date: Mon, 16 Jan 2017 23:56:18 -0600 Message-Id: <1484632578-4539-1-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1480361317-9937-11-git-send-email-jcrouse@codeaurora.org> References: <1480361317-9937-11-git-send-email-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a set remote state SCM API. This will be used by the Venus and GPU subsystems to set state on the remote processors. This work was based on two patch sets by Jordan Crouse and Stanimir Varbanov. Signed-off-by: Andy Gross Acked-by: Jordan Crouse Acked-by: Stanimir Varbanov --- drivers/firmware/qcom_scm-32.c | 18 ++++++++++++++++++ drivers/firmware/qcom_scm-64.c | 16 ++++++++++++++++ drivers/firmware/qcom_scm.c | 6 ++++++ drivers/firmware/qcom_scm.h | 2 ++ include/linux/qcom_scm.h | 4 +++- 5 files changed, 45 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c index c6aeedb..8ad226c 100644 --- a/drivers/firmware/qcom_scm-32.c +++ b/drivers/firmware/qcom_scm-32.c @@ -560,3 +560,21 @@ int __qcom_scm_pas_mss_reset(struct device *dev, bool reset) return ret ? : le32_to_cpu(out); } + +int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id) +{ + struct { + __le32 state; + __le32 id; + } req; + __le32 scm_ret = 0; + int ret; + + req.state = cpu_to_le32(state); + req.id = cpu_to_le32(id); + + ret = qcom_scm_call(dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_SET_REMOTE_STATE, + &req, sizeof(req), &scm_ret, sizeof(scm_ret)); + + return ret ? : le32_to_cpu(scm_ret); +} diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index 4a0f5ea..4b220ab 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -358,3 +358,19 @@ int __qcom_scm_pas_mss_reset(struct device *dev, bool reset) return ret ? : res.a1; } + +int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id) +{ + struct qcom_scm_desc desc = {0}; + struct arm_smccc_res res; + int ret; + + desc.args[0] = state; + desc.args[1] = id; + desc.arginfo = QCOM_SCM_ARGS(2); + + ret = qcom_scm_call(dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_SET_REMOTE_STATE, + &desc, &res); + + return ret ? : res.a1; +} diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 65d0d9d..d987bcc 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -324,6 +324,12 @@ bool qcom_scm_is_available(void) } EXPORT_SYMBOL(qcom_scm_is_available); +int qcom_scm_set_remote_state(u32 state, u32 id) +{ + return __qcom_scm_set_remote_state(__scm->dev, state, id); +} +EXPORT_SYMBOL(qcom_scm_set_remote_state); + static int qcom_scm_probe(struct platform_device *pdev) { struct qcom_scm *scm; diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 3584b00..6a0f154 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -15,6 +15,8 @@ #define QCOM_SCM_SVC_BOOT 0x1 #define QCOM_SCM_BOOT_ADDR 0x1 #define QCOM_SCM_BOOT_ADDR_MC 0x11 +#define QCOM_SCM_SET_REMOTE_STATE 0xa +extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id); #define QCOM_SCM_FLAG_HLOS 0x01 #define QCOM_SCM_FLAG_COLDBOOT_MC 0x02 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index 7e004fb..d32f6f1 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -39,6 +39,7 @@ extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, extern int qcom_scm_pas_shutdown(u32 peripheral); extern void qcom_scm_cpu_power_down(u32 flags); extern u32 qcom_scm_get_version(void); +extern int qcom_scm_set_remote_state(u32 state, u32 id); #else static inline int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) @@ -64,6 +65,7 @@ static inline int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; } static inline void qcom_scm_cpu_power_down(u32 flags) {} static inline u32 qcom_scm_get_version(void) { return 0; } +static inline u32 +qcom_scm_set_remote_state(u32 state,u32 id) { return -ENODEV; } #endif - #endif