From patchwork Fri Mar 3 21:48:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 9603613 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1B0F6604E2 for ; Fri, 3 Mar 2017 21:55:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0BB3D285ED for ; Fri, 3 Mar 2017 21:55:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E3BEE2861A; Fri, 3 Mar 2017 21:55:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E2EDF28617 for ; Fri, 3 Mar 2017 21:55:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752161AbdCCVz3 (ORCPT ); Fri, 3 Mar 2017 16:55:29 -0500 Received: from mail-pg0-f44.google.com ([74.125.83.44]:34009 "EHLO mail-pg0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752093AbdCCVz1 (ORCPT ); Fri, 3 Mar 2017 16:55:27 -0500 Received: by mail-pg0-f44.google.com with SMTP id 77so3693576pgc.1 for ; Fri, 03 Mar 2017 13:54:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HnX1R2U+zkFRnQ0FKBS4rl+0aVREUPJZAkkad61JZWI=; b=NVM1upbohj4s4XdP5+BCGjy3lCfII8PeDds/0GVCQkDE9T4p9VD6HUDt/tY1wsBf+7 B5adDrAxwih8Vx2whMp10sUH+gaAczuFJ2f50jCkqhnI2qMZltB463FETo4YxJ08zqam QIN3OANXZnfQOngC21V47FE5cg8DiJAU5tkNM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HnX1R2U+zkFRnQ0FKBS4rl+0aVREUPJZAkkad61JZWI=; b=tnxkL3FRbQWGz+tmVvjLwHphxVst/2kAoIZKqrLsJga9Kx4PK6nzMnGV7aPttRo+TR CJWJU4ks+D2XlPiaWnwcHELguv0pBeN4pXCTrmaS/KBJXOoLDYjguTB+swbl5ct2wuPt 1kqqSKphaqoLt/ZalZD3yiEWacROYWTUjWFmXIq9i8ROWtxHppWn26jptPuxdsa8SLuC 3HkE6SKwCCCeNOwtLcG+dZsOnBTGqfIvVoWq7Zuf21YwOCvUnK/A9ViqLumFle7NPSla rtsH0u6yyBrO1lO8YHZWB1nQzinp7HjDpuMlYcXv+MA35WXmWwI3x5dqSt3qj/4dq3Bm PTig== X-Gm-Message-State: AMke39k4ojaVlKHkW+Pk8+XCjcZULOFM+iTJEUCl6enIC4qmUBPift99YS09sXPeKRqCUhRx X-Received: by 10.99.94.198 with SMTP id s189mr6066824pgb.211.1488577709380; Fri, 03 Mar 2017 13:48:29 -0800 (PST) Received: from ubuntu.localdomain (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id q23sm25200585pfg.63.2017.03.03.13.48.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Mar 2017 13:48:28 -0800 (PST) From: Lina Iyer To: ulf.hansson@linaro.org, khilman@kernel.org, rjw@rjwysocki.net, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: andy.gross@linaro.org, sboyd@codeaurora.org, linux-arm-msm@vger.kernel.org, brendan.jackman@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, Juri.Lelli@arm.com, Lina Iyer , Mark Rutland Subject: [PATCH V5 3/6] drivers: firmware: psci: Support cluster idle states for OS-Initiated Date: Fri, 3 Mar 2017 13:48:14 -0800 Message-Id: <1488577697-127445-4-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488577697-127445-1-git-send-email-lina.iyer@linaro.org> References: <1488577697-127445-1-git-send-email-lina.iyer@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PSCI OS initiated firmware may allow Linux to determine the state of the CPU cluster and the cluster at coherency level to enter idle states when there are no active CPUs. Since Linux has a better idea of the QoS and the wakeup pattern of the CPUs, the cluster idle states may be better determined by the OS instead of the firmware. The last CPU entering idle in a cluster, is responsible for selecting the state of the cluster. Only one CPU in a cluster may provide the cluster idle state to the firmware. Similarly, the last CPU in the system may provide the state of the coherency domain along with the cluster and the CPU state IDs. Utilize the CPU PM domain framework's helper functions to build up the hierarchy of cluster topology using Generic PM domains. We provide callbacks for domain power_on and power_off. By appending the state IDs at each domain level in the -power_off() callbacks, we build up a composite state ID that can be passed onto the firmware to idle the CPU, the cluster and the coherency interface. Cc: Lorenzo Pieralisi Cc: Mark Rutland Signed-off-by: Lina Iyer --- drivers/firmware/psci.c | 93 +++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 90 insertions(+), 3 deletions(-) diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index ec922b8..18ae62d 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -54,6 +55,18 @@ */ static int resident_cpu = -1; static bool psci_has_osi; +static bool psci_has_osi_pd; +static DEFINE_PER_CPU(u32, cluster_state_id); + +static inline u32 psci_get_composite_state_id(u32 cpu_state) +{ + return cpu_state | this_cpu_read(cluster_state_id); +} + +static inline void psci_reset_composite_state_id(void) +{ + this_cpu_write(cluster_state_id, 0); +} bool psci_tos_resident_on(int cpu) { @@ -180,6 +193,8 @@ static int psci_cpu_on(unsigned long cpuid, unsigned long entry_point) fn = psci_function_id[PSCI_FN_CPU_ON]; err = invoke_psci_fn(fn, cpuid, entry_point, 0); + /* Reset CPU cluster states */ + psci_reset_composite_state_id(); return psci_to_linux_errno(err); } @@ -251,6 +266,27 @@ static int __init psci_features(u32 psci_func_id) #ifdef CONFIG_CPU_IDLE static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); +static bool psci_suspend_mode_is_osi; + +static int psci_set_suspend_mode_osi(bool enable) +{ + int ret; + int mode; + + if (enable && !psci_has_osi) + return -ENODEV; + + if (enable == psci_suspend_mode_is_osi) + return 0; + + mode = enable ? PSCI_1_0_SUSPEND_MODE_OSI : PSCI_1_0_SUSPEND_MODE_PC; + ret = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + mode, 0, 0); + if (!ret) + psci_suspend_mode_is_osi = enable; + + return psci_to_linux_errno(ret); +} static int psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) { @@ -353,6 +389,39 @@ static int __maybe_unused psci_acpi_cpu_init_idle(unsigned int cpu) } #endif +static int psci_pd_populate_state_data(struct device_node *np, u32 *param) +{ + return of_property_read_u32(np, "arm,psci-suspend-param", param); +} + +static int psci_pd_power_off(u32 idx, u32 param, const struct cpumask *mask) +{ + __this_cpu_add(cluster_state_id, param); + return 0; +} + +const struct cpu_pd_ops psci_pd_ops = { + .populate_state_data = psci_pd_populate_state_data, + .power_off = psci_pd_power_off, +}; + +static int psci_cpu_osi_pd_init(int cpu) +{ + int ret; + + if (!psci_has_osi_pd) + return 0; + + ret = of_setup_cpu_pd_single(cpu, &psci_pd_ops); + if (!ret) { + ret = psci_set_suspend_mode_osi(true); + if (ret) + pr_warn("CPU%d: Error setting PSCI OSI mode\n", cpu); + } + + return ret; +} + int psci_cpu_init_idle(unsigned int cpu) { struct device_node *cpu_node; @@ -368,6 +437,10 @@ int psci_cpu_init_idle(unsigned int cpu) if (!acpi_disabled) return psci_acpi_cpu_init_idle(cpu); + ret = psci_cpu_osi_pd_init(cpu); + if (ret) + return ret; + cpu_node = of_get_cpu_node(cpu, NULL); if (!cpu_node) return -ENODEV; @@ -382,15 +455,17 @@ int psci_cpu_init_idle(unsigned int cpu) static int psci_suspend_finisher(unsigned long index) { u32 *state = __this_cpu_read(psci_power_state); + u32 ext_state = psci_get_composite_state_id(state[index - 1]); - return psci_ops.cpu_suspend(state[index - 1], - virt_to_phys(cpu_resume)); + return psci_ops.cpu_suspend(ext_state, virt_to_phys(cpu_resume)); } int psci_cpu_suspend_enter(unsigned long index) { int ret; u32 *state = __this_cpu_read(psci_power_state); + u32 ext_state = psci_get_composite_state_id(state[index - 1]); + /* * idle state index 0 corresponds to wfi, should never be called * from the cpu_suspend operations @@ -399,10 +474,16 @@ int psci_cpu_suspend_enter(unsigned long index) return -EINVAL; if (!psci_power_state_loses_context(state[index - 1])) - ret = psci_ops.cpu_suspend(state[index - 1], 0); + ret = psci_ops.cpu_suspend(ext_state, 0); else ret = cpu_suspend(index, psci_suspend_finisher); + /* + * Clear the CPU's cluster states, we start afresh after coming + * out of idle. + */ + psci_reset_composite_state_id(); + return ret; } @@ -610,6 +691,7 @@ static int __init psci_0_1_init(struct device_node *np) static int __init psci_1_0_init(struct device_node *np) { + struct device_node *dn; int ret; ret = psci_0_2_init(np); @@ -621,6 +703,11 @@ static int __init psci_1_0_init(struct device_node *np) if (ret & PSCI_1_0_OS_INITIATED) { if (!psci_features(PSCI_1_0_FN_SET_SUSPEND_MODE)) psci_has_osi = true; + /* Check if we power domains defined in the PSCI node */ + dn = of_find_node_with_property(np, "#power-domain-cells"); + if (dn) + psci_has_osi_pd = true; + of_node_put(dn); } return 0;