From patchwork Mon Jul 17 12:03:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 9844755 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3E12E60386 for ; Mon, 17 Jul 2017 12:05:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 301112843B for ; Mon, 17 Jul 2017 12:05:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2488726E97; Mon, 17 Jul 2017 12:05:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A6D1A26E97 for ; Mon, 17 Jul 2017 12:05:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751431AbdGQME5 (ORCPT ); Mon, 17 Jul 2017 08:04:57 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:48554 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751280AbdGQMEy (ORCPT ); Mon, 17 Jul 2017 08:04:54 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 943846073D; Mon, 17 Jul 2017 12:04:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1500293093; bh=9cD7OeESu7Y9cMvuaW54B1b4xMH/82TU+AZ9/PxVbvg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ScPDcEnm6qrwcJkDtligI4M58uZFzxzKdba9EQR3MqfgLiqFfb8jfILsERtkRr5qF dXAb0NvsMmEAFQJlrqkLYr9puSY2eczKr+ZcOOtPSKSMPtg2g4QZV+H2AwxoP9W2vQ GEmAVCgFCIAej2Q/TFjC2snPnf0vrcucFt1VmNVQ= Received: from varda-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: varada@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id D63776141F; Mon, 17 Jul 2017 12:04:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1500293090; bh=9cD7OeESu7Y9cMvuaW54B1b4xMH/82TU+AZ9/PxVbvg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A2Q8mTItNFbpnUz4QzKKzW/xcS8XOW7EovU8N6g68flpyfi0gdcu2u06BG/NI06l6 zcs2DJV330HE++HuqUNPki7bHF/BZt0HH9E2DEQzoz2oPwqP2zo3VH4TzIAdpwsaTZ zu3mu7oHsNquSwVLqYvxQ/jHfs2kumJcLGYbw0hw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D63776141F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=varada@codeaurora.org From: Varadarajan Narayanan To: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, svarbanov@mm-sol.com, kishon@ti.com, sboyd@codeaurora.org, vivek.gautam@codeaurora.org, fengguang.wu@intel.com, weiyongjun1@huawei.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Varadarajan Narayanan Subject: [PATCH 3/7] phy: qcom-qmp: Fix phy pipe clock name Date: Mon, 17 Jul 2017 17:33:59 +0530 Message-Id: <1500293043-1887-4-git-send-email-varada@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1500293043-1887-1-git-send-email-varada@codeaurora.org> References: <1500293043-1887-1-git-send-email-varada@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Presently, the phy pipe clock's name is assumed to be either usb3_phy_pipe_clk_src or pcie_XX_pipe_clk_src (where XX is the phy lane's number). However, this will not work if an SoC has more than one instance of the phy. Hence, instead of assuming the name of the clock, fetch it from the DT. Signed-off-by: Varadarajan Narayanan Acked-by: Vivek Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 78ca628..97020ec 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -925,20 +925,13 @@ static int qcom_qmp_phy_clk_init(struct device *dev) * clk | +-------+ | +-----+ * +---------------+ */ -static int phy_pipe_clk_register(struct qcom_qmp *qmp, int id) +static int phy_pipe_clk_register(struct qcom_qmp *qmp, const char *clk_name) { - char name[24]; struct clk_fixed_rate *fixed; struct clk_init_data init = { }; - switch (qmp->cfg->type) { - case PHY_TYPE_USB3: - snprintf(name, sizeof(name), "usb3_phy_pipe_clk_src"); - break; - case PHY_TYPE_PCIE: - snprintf(name, sizeof(name), "pcie_%d_pipe_clk_src", id); - break; - default: + if ((qmp->cfg->type != PHY_TYPE_USB3) && + (qmp->cfg->type != PHY_TYPE_PCIE)) { /* not all phys register pipe clocks, so return success */ return 0; } @@ -947,7 +940,7 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, int id) if (!fixed) return -ENOMEM; - init.name = name; + init.name = clk_name; init.ops = &clk_fixed_rate_ops; /* controllers using QMP phys use 125MHz pipe clock interface */ @@ -1110,6 +1103,8 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev) id = 0; for_each_available_child_of_node(dev->of_node, child) { + const char *clk_name; + /* Create per-lane phy */ ret = qcom_qmp_phy_create(dev, child, id); if (ret) { @@ -1118,11 +1113,20 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev) return ret; } + ret = of_property_read_string(child, "clock-output-names", + &clk_name); + if (ret) { + dev_err(dev, + "failed to get clock-output-names for lane%d phy, %d\n", + id, ret); + return ret; + } + /* * Register the pipe clock provided by phy. * See function description to see details of this pipe clock. */ - ret = phy_pipe_clk_register(qmp, id); + ret = phy_pipe_clk_register(qmp, clk_name); if (ret) { dev_err(qmp->dev, "failed to register pipe clock source\n");