From patchwork Mon Jul 24 07:47:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 9858891 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B6A996038F for ; Mon, 24 Jul 2017 07:48:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A8D9B2817F for ; Mon, 24 Jul 2017 07:48:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9D7D128562; Mon, 24 Jul 2017 07:48:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3023D2854F for ; Mon, 24 Jul 2017 07:48:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752355AbdGXHrw (ORCPT ); Mon, 24 Jul 2017 03:47:52 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:58872 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751520AbdGXHrp (ORCPT ); Mon, 24 Jul 2017 03:47:45 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 6FC7B6084D; Mon, 24 Jul 2017 07:47:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1500882463; bh=Qi4ccpbrnhu/b7ySF+4E1VYuCWpwed6HbiPLxQ5hb4g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hfMNlgoLwGBXxffqPgl7+nXjFd0fNSDEN9wvVWIRxxVvtjMTTHmiHI5u9oFBZ0nxD wVhemq98RtJfstKvxy885RiTTWFvCp3xnVi2PAwDMmH4YOVes+C2lq5Bxxwsxg+iMj LQkMMZyES3HQo3P3V/A3B2jiPXxNp5YY6LDNq394= Received: from varda-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: varada@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 00BA360998; Mon, 24 Jul 2017 07:47:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1500882463; bh=Qi4ccpbrnhu/b7ySF+4E1VYuCWpwed6HbiPLxQ5hb4g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hfMNlgoLwGBXxffqPgl7+nXjFd0fNSDEN9wvVWIRxxVvtjMTTHmiHI5u9oFBZ0nxD wVhemq98RtJfstKvxy885RiTTWFvCp3xnVi2PAwDMmH4YOVes+C2lq5Bxxwsxg+iMj LQkMMZyES3HQo3P3V/A3B2jiPXxNp5YY6LDNq394= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 00BA360998 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=varada@codeaurora.org From: Varadarajan Narayanan To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: Varadarajan Narayanan , Sham Muthayyan Subject: [PATCH v5 01/14] spi: qup: Enable chip select support Date: Mon, 24 Jul 2017 13:17:12 +0530 Message-Id: <1500882445-29008-2-git-send-email-varada@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1500882445-29008-1-git-send-email-varada@codeaurora.org> References: <1500882445-29008-1-git-send-email-varada@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable chip select support for QUP versions later than v1. The chip select support was broken in QUP version 1. Hence the chip select support was removed earlier in an earlier commit (4a8573abe "spi: qup: Remove chip select function"). Since the chip select support is functional in recent versions of QUP, re-enabling it for QUP versions later than v1. Signed-off-by: Sham Muthayyan Signed-off-by: Varadarajan Narayanan --- drivers/spi/spi-qup.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c index 1bfa889..c0d4def 100644 --- a/drivers/spi/spi-qup.c +++ b/drivers/spi/spi-qup.c @@ -750,6 +750,24 @@ static int spi_qup_init_dma(struct spi_master *master, resource_size_t base) return ret; } +static void spi_qup_set_cs(struct spi_device *spi, bool val) +{ + struct spi_qup *controller; + u32 spi_ioc; + u32 spi_ioc_orig; + + controller = spi_master_get_devdata(spi->master); + spi_ioc = readl_relaxed(controller->base + SPI_IO_CONTROL); + spi_ioc_orig = spi_ioc; + if (!val) + spi_ioc |= SPI_IO_C_FORCE_CS; + else + spi_ioc &= ~SPI_IO_C_FORCE_CS; + + if (spi_ioc != spi_ioc_orig) + writel_relaxed(spi_ioc, controller->base + SPI_IO_CONTROL); +} + static int spi_qup_probe(struct platform_device *pdev) { struct spi_master *master; @@ -846,6 +864,9 @@ static int spi_qup_probe(struct platform_device *pdev) if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1")) controller->qup_v1 = 1; + if (!controller->qup_v1) + master->set_cs = spi_qup_set_cs; + spin_lock_init(&controller->lock); init_completion(&controller->done);