| Message ID | 1514978930-31341-5-git-send-email-mgautam@codeaurora.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | Andy Gross |
| Headers | show |
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam <mgautam@codeaurora.org> wrote: > PHY must be powered on before turning ON clocks and > attempting to initialize it. Driver is exposing > separate init and power_on routines for this. > Apparently USB dwc3 core driver performs power-on > after init. Also, poweron and init for QUSB2 PHY > need to be executed together always, hence remove > poweron callback from phy_ops and explicitly perform > this from init, similar changes needed for poweroff. > > Signed-off-by: Manu Gautam <mgautam@codeaurora.org> > --- Looks good. Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Thanks Vivek > drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++++++++++------------------------ > 1 file changed, 15 insertions(+), 32 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c > index 6c57524..4a5b2a1 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c > +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c > @@ -195,54 +195,31 @@ static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy) > qusb2_setbits(qphy->base, QUSB2PHY_PORT_TUNE2, val[0] << 0x4); > } > > -static int qusb2_phy_poweron(struct phy *phy) > +static int qusb2_phy_init(struct phy *phy) > { > struct qusb2_phy *qphy = phy_get_drvdata(phy); > - int num = ARRAY_SIZE(qphy->vregs); > + unsigned int val; > + unsigned int clk_scheme; > int ret; > > - dev_vdbg(&phy->dev, "%s(): Powering-on QUSB2 phy\n", __func__); > + dev_vdbg(&phy->dev, "%s(): Initializing QUSB2 phy\n", __func__); > > /* turn on regulator supplies */ > - ret = regulator_bulk_enable(num, qphy->vregs); > + ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); > if (ret) > return ret; > > ret = clk_prepare_enable(qphy->iface_clk); > if (ret) { > dev_err(&phy->dev, "failed to enable iface_clk, %d\n", ret); > - regulator_bulk_disable(num, qphy->vregs); > - return ret; > + goto poweroff_phy; > } > > - return 0; > -} > - > -static int qusb2_phy_poweroff(struct phy *phy) > -{ > - struct qusb2_phy *qphy = phy_get_drvdata(phy); > - > - clk_disable_unprepare(qphy->iface_clk); > - > - regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); > - > - return 0; > -} > - > -static int qusb2_phy_init(struct phy *phy) > -{ > - struct qusb2_phy *qphy = phy_get_drvdata(phy); > - unsigned int val; > - unsigned int clk_scheme; > - int ret; > - > - dev_vdbg(&phy->dev, "%s(): Initializing QUSB2 phy\n", __func__); > - > /* enable ahb interface clock to program phy */ > ret = clk_prepare_enable(qphy->cfg_ahb_clk); > if (ret) { > dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); > - return ret; > + goto disable_iface_clk; > } > > /* Perform phy reset */ > @@ -344,6 +321,11 @@ static int qusb2_phy_init(struct phy *phy) > reset_control_assert(qphy->phy_reset); > disable_ahb_clk: > clk_disable_unprepare(qphy->cfg_ahb_clk); > +disable_iface_clk: > + clk_disable_unprepare(qphy->iface_clk); > +poweroff_phy: > + regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); > + > return ret; > } > > @@ -361,6 +343,9 @@ static int qusb2_phy_exit(struct phy *phy) > reset_control_assert(qphy->phy_reset); > > clk_disable_unprepare(qphy->cfg_ahb_clk); > + clk_disable_unprepare(qphy->iface_clk); > + > + regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); > > return 0; > } > @@ -368,8 +353,6 @@ static int qusb2_phy_exit(struct phy *phy) > static const struct phy_ops qusb2_phy_gen_ops = { > .init = qusb2_phy_init, > .exit = qusb2_phy_exit, > - .power_on = qusb2_phy_poweron, > - .power_off = qusb2_phy_poweroff, > .owner = THIS_MODULE, > }; > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project > > -- > To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c index 6c57524..4a5b2a1 100644 --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c @@ -195,54 +195,31 @@ static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy) qusb2_setbits(qphy->base, QUSB2PHY_PORT_TUNE2, val[0] << 0x4); } -static int qusb2_phy_poweron(struct phy *phy) +static int qusb2_phy_init(struct phy *phy) { struct qusb2_phy *qphy = phy_get_drvdata(phy); - int num = ARRAY_SIZE(qphy->vregs); + unsigned int val; + unsigned int clk_scheme; int ret; - dev_vdbg(&phy->dev, "%s(): Powering-on QUSB2 phy\n", __func__); + dev_vdbg(&phy->dev, "%s(): Initializing QUSB2 phy\n", __func__); /* turn on regulator supplies */ - ret = regulator_bulk_enable(num, qphy->vregs); + ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); if (ret) return ret; ret = clk_prepare_enable(qphy->iface_clk); if (ret) { dev_err(&phy->dev, "failed to enable iface_clk, %d\n", ret); - regulator_bulk_disable(num, qphy->vregs); - return ret; + goto poweroff_phy; } - return 0; -} - -static int qusb2_phy_poweroff(struct phy *phy) -{ - struct qusb2_phy *qphy = phy_get_drvdata(phy); - - clk_disable_unprepare(qphy->iface_clk); - - regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); - - return 0; -} - -static int qusb2_phy_init(struct phy *phy) -{ - struct qusb2_phy *qphy = phy_get_drvdata(phy); - unsigned int val; - unsigned int clk_scheme; - int ret; - - dev_vdbg(&phy->dev, "%s(): Initializing QUSB2 phy\n", __func__); - /* enable ahb interface clock to program phy */ ret = clk_prepare_enable(qphy->cfg_ahb_clk); if (ret) { dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); - return ret; + goto disable_iface_clk; } /* Perform phy reset */ @@ -344,6 +321,11 @@ static int qusb2_phy_init(struct phy *phy) reset_control_assert(qphy->phy_reset); disable_ahb_clk: clk_disable_unprepare(qphy->cfg_ahb_clk); +disable_iface_clk: + clk_disable_unprepare(qphy->iface_clk); +poweroff_phy: + regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); + return ret; } @@ -361,6 +343,9 @@ static int qusb2_phy_exit(struct phy *phy) reset_control_assert(qphy->phy_reset); clk_disable_unprepare(qphy->cfg_ahb_clk); + clk_disable_unprepare(qphy->iface_clk); + + regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); return 0; } @@ -368,8 +353,6 @@ static int qusb2_phy_exit(struct phy *phy) static const struct phy_ops qusb2_phy_gen_ops = { .init = qusb2_phy_init, .exit = qusb2_phy_exit, - .power_on = qusb2_phy_poweron, - .power_off = qusb2_phy_poweroff, .owner = THIS_MODULE, };
PHY must be powered on before turning ON clocks and attempting to initialize it. Driver is exposing separate init and power_on routines for this. Apparently USB dwc3 core driver performs power-on after init. Also, poweron and init for QUSB2 PHY need to be executed together always, hence remove poweron callback from phy_ops and explicitly perform this from init, similar changes needed for poweroff. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 47 +++++++++++------------------------ 1 file changed, 15 insertions(+), 32 deletions(-)