From patchwork Tue Jan 16 10:57:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manu Gautam X-Patchwork-Id: 10166515 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 83056600CA for ; Tue, 16 Jan 2018 11:02:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7D84023B32 for ; Tue, 16 Jan 2018 11:02:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7221527480; Tue, 16 Jan 2018 11:02:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 716F323B32 for ; Tue, 16 Jan 2018 11:02:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751335AbeAPLCC (ORCPT ); Tue, 16 Jan 2018 06:02:02 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:46482 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751791AbeAPK6E (ORCPT ); Tue, 16 Jan 2018 05:58:04 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0FF44601D4; Tue, 16 Jan 2018 10:58:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516100284; bh=PDqAbXSnyV4lJjztBo+0BX5WSjotRKdfpe0tzF6heM0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R2CqvxoZ/4ADFHOlzR4GU7kqN0eEQUgK1qBh2ux5kOI/Rmfh8iMryCccREsmLTnjb qNaXRNWR2io2GoPMOTnSVqzluq0rwcdEtglH+UbUGMNyT8e+4Fqj0+7gpOoln2BMaN RbkakvcS/CaOxewwnyqH74ZSEpsNMfrAOQS+yOAI= Received: from mgautam-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mgautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 89A7B601D4; Tue, 16 Jan 2018 10:58:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516100283; bh=PDqAbXSnyV4lJjztBo+0BX5WSjotRKdfpe0tzF6heM0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SqHxyVel/Hw+PFbM8b89PBdmd0leAeXOfMs0AxsHyIm1hYE1uq7myMzIwGU6WZqRQ Mdg4qG4hr594vL+QTF09n2d3EvQUECaiz8a6c+r59eONfwRJ0TXgJUNRcaTKWrIpIw wvXFfvBIK16aKy0BYzI2YB8d0HOmwgEe8dKyOc58= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 89A7B601D4 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=mgautam@codeaurora.org From: Manu Gautam To: Kishon Vijay Abraham I Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, Manu Gautam , Vivek Gautam , Varadarajan Narayanan , smuthayy , Fengguang Wu , Wei Yongjun , linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v5 05/17] phy: qcom-qmp: Fix PHY block reset sequence Date: Tue, 16 Jan 2018 16:27:00 +0530 Message-Id: <1516100232-18623-6-git-send-email-mgautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516100232-18623-1-git-send-email-mgautam@codeaurora.org> References: <1516100232-18623-1-git-send-email-mgautam@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PHY block or asynchronous reset requires signal to be asserted before de-asserting. Driver is only de-asserting signal which is already low, hence reset operation is a no-op. Fix this by asserting signal first. Also, resetting requires PHY clocks to be turned ON only after reset is finished. Fix that as well. Signed-off-by: Manu Gautam Reviewed-by: Vivek Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 1b82cea..ecff261 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -752,13 +752,16 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) goto err_reg_enable; } - ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); - if (ret) { - dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret); - goto err_clk_enable; + for (i = 0; i < cfg->num_resets; i++) { + ret = reset_control_assert(qmp->resets[i]); + if (ret) { + dev_err(qmp->dev, "%s reset assert failed\n", + cfg->reset_list[i]); + goto err_rst_assert; + } } - for (i = 0; i < cfg->num_resets; i++) { + for (i = cfg->num_resets - 1; i >= 0; i--) { ret = reset_control_deassert(qmp->resets[i]); if (ret) { dev_err(qmp->dev, "%s reset deassert failed\n", @@ -767,6 +770,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) } } + ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); + if (ret) { + dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret); + goto err_rst; + } + if (cfg->has_phy_com_ctrl) qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL], SW_PWRDN); @@ -791,7 +800,7 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) if (ret) { dev_err(qmp->dev, "phy common block init timed-out\n"); - goto err_rst; + goto err_com_init; } } @@ -799,11 +808,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) return 0; +err_com_init: + clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); err_rst: - while (--i >= 0) + while (++i < cfg->num_resets) reset_control_assert(qmp->resets[i]); - clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); -err_clk_enable: +err_rst_assert: regulator_bulk_disable(cfg->num_vregs, qmp->vregs); err_reg_enable: mutex_unlock(&qmp->phy_mutex);