From patchwork Thu Mar 29 21:26:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilia Lin X-Patchwork-Id: 10316357 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2D91B60383 for ; Thu, 29 Mar 2018 21:31:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0D1F12A5A6 for ; Thu, 29 Mar 2018 21:31:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0B4032A647; Thu, 29 Mar 2018 21:31:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6CB162A5A6 for ; Thu, 29 Mar 2018 21:30:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752296AbeC2V1j (ORCPT ); Thu, 29 Mar 2018 17:27:39 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:34150 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751189AbeC2V1h (ORCPT ); Thu, 29 Mar 2018 17:27:37 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1A03A60F6C; Thu, 29 Mar 2018 21:27:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522358857; bh=BskuUz2xUKbViCS7AuhPQipDo2jjI/XzJW42gCFgkDE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HUaum+Z+mqzYy3bSHx4wfcJ4qxl/Tn0jehE6z9KfhsPMMFbE2/DJdDyCJx42RTTiZ VGaKsmdM3Jcv4sjfy+Mf5ycaxYHQAyarHMPnSzqkFmydryeS3LhuPoscE24GawkQhr qAJteSmJxtXPJTsYRrvhMvNBT2Qe9rv1LE4qLuCo= Received: from lx-ilial.mea.qualcomm.com (unknown [185.23.60.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilialin@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 50A36610DC; Thu, 29 Mar 2018 21:27:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522358847; bh=BskuUz2xUKbViCS7AuhPQipDo2jjI/XzJW42gCFgkDE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Shyu8yCvum4otNu4/fB/5KT2n/Sk+sh6X6vB6k4vdDUgvHvnQ0xD/IDCw73abQHCc PWAy2+r9siiLcCBbcgdz2NA2XX+SBxa3cBrSv8zzQ4fShXFHi9vRPDz3WOdZo7ZP4U 5SgNAh9wsCLQeu0g9AUmgJtLAPo0aVS8GQTpdELI= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 50A36610DC Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilialin@codeaurora.org From: Ilia Lin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, mark.rutland@arm.com, rjw@rjwysocki.net, viresh.kumar@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org, david.brown@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: rnayak@codeaurora.org, ilialin@codeaurora.org, amit.kucheria@linaro.org, nicolas.dechesne@linaro.org, celster@codeaurora.org, tfinkel@codeaurora.org Subject: [PATCH v4 05/14] clk: qcom: cpu-8996: Add support to switch to alternate PLL Date: Fri, 30 Mar 2018 00:26:38 +0300 Message-Id: <1522358807-10413-6-git-send-email-ilialin@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1522358807-10413-1-git-send-email-ilialin@codeaurora.org> References: <1522358807-10413-1-git-send-email-ilialin@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rajendra Nayak Each of the CPU clusters on msm8996 are powered via a primary PLL and a secondary PLL. The primary PLL is what drives the CPU clk, except for times when we are reprogramming the PLL itself, when we temporarily switch to an alternate PLL. Use clock rate change notifiers to support this. Signed-off-by: Rajendra Nayak Signed-off-by: Ilia Lin --- drivers/clk/qcom/clk-cpu-8996.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c index f096410..12585b1 100644 --- a/drivers/clk/qcom/clk-cpu-8996.c +++ b/drivers/clk/qcom/clk-cpu-8996.c @@ -62,6 +62,7 @@ * detect voltage droops. We do not add support for ACD as yet. */ +#include #include #include #include @@ -188,10 +189,14 @@ struct clk_cpu_8996_mux { u32 reg; u8 shift; u8 width; + struct notifier_block nb; struct clk_hw *pll; struct clk_regmap clkr; }; +#define to_clk_cpu_8996_mux_nb(_nb) \ + container_of(_nb, struct clk_cpu_8996_mux, nb) + static inline struct clk_cpu_8996_mux *to_clk_cpu_8996_mux_hw(struct clk_hw *hw) { @@ -237,6 +242,26 @@ static int clk_cpu_8996_mux_set_parent(struct clk_hw *hw, u8 index) return 0; } +int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event, + void *data) +{ + int ret; + struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_nb(nb); + + switch (event) { + case PRE_RATE_CHANGE: + ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, ALT_INDEX); + break; + case POST_RATE_CHANGE: + ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, PLL_INDEX); + break; + default: + ret = 0; + break; + } + + return notifier_from_errno(ret); +}; const struct clk_ops clk_cpu_8996_mux_ops = { .set_parent = clk_cpu_8996_mux_set_parent, .get_parent = clk_cpu_8996_mux_get_parent, @@ -280,6 +305,7 @@ static int clk_cpu_8996_mux_set_parent(struct clk_hw *hw, u8 index) .shift = 0, .width = 2, .pll = &pwrcl_pll.clkr.hw, + .nb.notifier_call = cpu_clk_notifier_cb, .clkr.hw.init = &(struct clk_init_data) { .name = "pwrcl_pmux", .parent_names = (const char *[]){ @@ -299,6 +325,7 @@ static int clk_cpu_8996_mux_set_parent(struct clk_hw *hw, u8 index) .shift = 0, .width = 2, .pll = &perfcl_pll.clkr.hw, + .nb.notifier_call = cpu_clk_notifier_cb, .clkr.hw.init = &(struct clk_init_data) { .name = "perfcl_pmux", .parent_names = (const char *[]){ @@ -357,6 +384,12 @@ struct clk_regmap *clks[] = { clk_alpha_pll_configure(&perfcl_alt_pll, regmap, &altpll_config); clk_alpha_pll_configure(&pwrcl_alt_pll, regmap, &altpll_config); + ret = clk_notifier_register(pwrcl_pmux.clkr.hw.clk, &pwrcl_pmux.nb); + if (ret) + return ret; + + ret = clk_notifier_register(perfcl_pmux.clkr.hw.clk, &perfcl_pmux.nb); + return ret; }