From patchwork Fri Apr 13 02:30:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinan Kaya X-Patchwork-Id: 10339347 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BEAD6600D0 for ; Fri, 13 Apr 2018 02:30:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AE2F028474 for ; Fri, 13 Apr 2018 02:30:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9FFC028632; Fri, 13 Apr 2018 02:30:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2E8CA28474 for ; Fri, 13 Apr 2018 02:30:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752605AbeDMCay (ORCPT ); Thu, 12 Apr 2018 22:30:54 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:48936 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752584AbeDMCax (ORCPT ); Thu, 12 Apr 2018 22:30:53 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id E930060274; Fri, 13 Apr 2018 02:30:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1523586652; bh=gt/baHg+YOtYxbcPB+ga2CKKrno8z+c2HwxNKeRapjE=; h=From:To:Cc:Subject:Date:From; b=BflMDgOP1ZK+jkVnrrmjJQFyvfzLgXOMnZlIbxZSvDybIlsY3P6615beHx17+GBeW RqkN0+/5d7rQVJEFNjzMQDZmS5dVWXPgXmu3sa6Vobl7ms6YGB38DKnQXIG8/B8yAE OcR4+a0pc2Y84zAL+OBmqBi862NjN2djOBJaK8Yw= Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 10B7960F8D; Fri, 13 Apr 2018 02:30:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1523586652; bh=gt/baHg+YOtYxbcPB+ga2CKKrno8z+c2HwxNKeRapjE=; h=From:To:Cc:Subject:Date:From; b=BflMDgOP1ZK+jkVnrrmjJQFyvfzLgXOMnZlIbxZSvDybIlsY3P6615beHx17+GBeW RqkN0+/5d7rQVJEFNjzMQDZmS5dVWXPgXmu3sa6Vobl7ms6YGB38DKnQXIG8/B8yAE OcR4+a0pc2Y84zAL+OBmqBi862NjN2djOBJaK8Yw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 10B7960F8D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: linux-mips@linux-mips.org, arnd@arndb.de, timur@codeaurora.org, sulrich@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , Ralf Baechle , James Hogan , Paul Burton , linux-kernel@vger.kernel.org Subject: [PATCH v4 1/2] MIPS: io: prevent compiler reordering on the default writeX() implementation Date: Thu, 12 Apr 2018 22:30:43 -0400 Message-Id: <1523586646-19630-1-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP writeX() has a strong ordering semantics with respect to memory updates. In the abscence of a write barrier or a compiler barrier, commpiler can reorder register and memory update instructions. This breaks the writeX() API. Signed-off-by: Sinan Kaya --- arch/mips/include/asm/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 0cbf3af..fd00ddaf 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -307,7 +307,7 @@ static inline void iounmap(const volatile void __iomem *addr) #if defined(CONFIG_CPU_CAVIUM_OCTEON) || defined(CONFIG_LOONGSON3_ENHANCEMENT) #define war_io_reorder_wmb() wmb() #else -#define war_io_reorder_wmb() do { } while (0) +#define war_io_reorder_wmb() barrier() #endif #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \