From patchwork Thu May 3 12:20:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 10378087 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7C56760353 for ; Thu, 3 May 2018 12:25:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 69AF42018E for ; Thu, 3 May 2018 12:25:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5D711281F9; Thu, 3 May 2018 12:25:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD0842018E for ; Thu, 3 May 2018 12:25:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751839AbeECMVG (ORCPT ); Thu, 3 May 2018 08:21:06 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:41196 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751805AbeECMVD (ORCPT ); Thu, 3 May 2018 08:21:03 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9A08D60588; Thu, 3 May 2018 12:21:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525350062; bh=o/Fz5rPCTrS0jE2MAbpkASS+jAR6lL+4R7omzwZZnjQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fAuihqOeWIBNZEgIkPc+N4n40BI1dsK7bWK8l3oRXxVPwmla5gYAAEUpEBOLJ42mL khYFFwHnNbg7/Q/bv/KKyAlbq9oh/7z7PgfgIr/1qp6KM8Ud422cupVh/q47aBh+zM 3/mJ3m1FwvWXp5R5Ffm+JBJ9cxy1PH6b2NB60mcs= Received: from absahu-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: absahu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6AB7C60588; Thu, 3 May 2018 12:20:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525350061; bh=o/Fz5rPCTrS0jE2MAbpkASS+jAR6lL+4R7omzwZZnjQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hr1NsdwakO2BS+dpQ/X1EOvlknyoF90mf92WSoqIRypALSXzoQxO04WJUusEZvPYE ugjsd4+sGrwckjDFLK2SOqgL1EcCs3xqpH3M0c8fJKMdM71P+WxmWdA5DgEaMbDKi0 02loIuK/bCTenSG2gRrA7UgQtt42P4O65mSTnOQk= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6AB7C60588 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=absahu@codeaurora.org From: Abhishek Sahu To: Boris Brezillon Cc: David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Miquel Raynal , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Andy Gross , Archit Taneja , Abhishek Sahu , Masahiro Yamada Subject: [PATCH v2 02/14] mtd: rawnand: denali: use helper function for ecc setup Date: Thu, 3 May 2018 17:50:29 +0530 Message-Id: <1525350041-22995-3-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525350041-22995-1-git-send-email-absahu@codeaurora.org> References: <1525350041-22995-1-git-send-email-absahu@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now, the NAND base layer has helper function for ecc parameters setup which does the same thing. CC: Masahiro Yamada Signed-off-by: Abhishek Sahu Acked-by: Miquel Raynal --- * Changes from v1: NEW PATCH drivers/mtd/nand/raw/denali.c | 30 ++---------------------------- 1 file changed, 2 insertions(+), 28 deletions(-) diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index 2a302a1..d75f4e5 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -1120,33 +1120,6 @@ int denali_calc_ecc_bytes(int step_size, int strength) } EXPORT_SYMBOL(denali_calc_ecc_bytes); -static int denali_ecc_setup(struct mtd_info *mtd, struct nand_chip *chip, - struct denali_nand_info *denali) -{ - int oobavail = mtd->oobsize - denali->oob_skip_bytes; - int ret; - - /* - * If .size and .strength are already set (usually by DT), - * check if they are supported by this controller. - */ - if (chip->ecc.size && chip->ecc.strength) - return nand_check_ecc_caps(chip, denali->ecc_caps, oobavail); - - /* - * We want .size and .strength closest to the chip's requirement - * unless NAND_ECC_MAXIMIZE is requested. - */ - if (!(chip->ecc.options & NAND_ECC_MAXIMIZE)) { - ret = nand_match_ecc_req(chip, denali->ecc_caps, oobavail); - if (!ret) - return 0; - } - - /* Max ECC strength is the last thing we can do */ - return nand_maximize_ecc(chip, denali->ecc_caps, oobavail); -} - static int denali_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *oobregion) { @@ -1317,7 +1290,8 @@ int denali_init(struct denali_nand_info *denali) chip->ecc.mode = NAND_ECC_HW_SYNDROME; chip->options |= NAND_NO_SUBPAGE_WRITE; - ret = denali_ecc_setup(mtd, chip, denali); + ret = nand_ecc_param_setup(chip, denali->ecc_caps, + mtd->oobsize - denali->oob_skip_bytes); if (ret) { dev_err(denali->dev, "Failed to setup ECC settings.\n"); goto disable_irq;