From patchwork Mon May 21 11:25:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilia Lin X-Patchwork-Id: 10414795 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CD65C6032B for ; Mon, 21 May 2018 11:28:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BFF3B2785D for ; Mon, 21 May 2018 11:28:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B359C27C05; Mon, 21 May 2018 11:28:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 645CD2785D for ; Mon, 21 May 2018 11:28:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753119AbeEUL1n (ORCPT ); Mon, 21 May 2018 07:27:43 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:41426 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753075AbeEUL1E (ORCPT ); Mon, 21 May 2018 07:27:04 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 720456081C; Mon, 21 May 2018 11:27:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526902023; bh=xZi37WiV7tLUypPsrz/jOtK+8V1sSgUgEDgMmEhZeWo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IBN7mIcX8cpsoD8RC0AmIy5s6gTVKQ5mf2w52rnfi3cFiDHPAALdVsgL3H2wMXN2y WeRJpyT4b6YNRo56CP/y6xVuyQReiAS9J6wN+g0hF/C6sYMCM7+9/HuagD7xqPxcmp 7T4ysmRUqCr3165p6Prf30XcCCBb5wXidGpRguiw= Received: from lx-ilial.mea.qualcomm.com (unknown [185.23.60.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilialin@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5CD1E602BC; Mon, 21 May 2018 11:26:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526902022; bh=xZi37WiV7tLUypPsrz/jOtK+8V1sSgUgEDgMmEhZeWo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=evf3Z0YKHMcvyXlILdjUSxMV/8TNtPj1kOXVa7eloQRWj95/ssJCCWRgdyuIozk51 Qn+AB8eMkIn/DRtQdB9S7+DnLg1LOvMXS4aT/RmIGm/WtUy18ZQC9qzWQA1DWYkIGp Q6lnuJoaA9mz5UXnIsSMLEJXQH4p6EjaRG3CYobw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5CD1E602BC Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilialin@codeaurora.org From: Ilia Lin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, mark.rutland@arm.com, viresh.kumar@linaro.org, nm@ti.com, lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org, david.brown@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, rjw@rjwysocki.net, linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rnayak@codeaurora.org, ilialin@codeaurora.org, amit.kucheria@linaro.org, nicolas.dechesne@linaro.org, celster@codeaurora.org, tfinkel@codeaurora.org Subject: [PATCH v9 14/15] dt-bindings: qcom_spmi: Document SAW support Date: Mon, 21 May 2018 14:25:31 +0300 Message-Id: <1526901932-9514-15-git-send-email-ilialin@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526901932-9514-1-git-send-email-ilialin@codeaurora.org> References: <1526901932-9514-1-git-send-email-ilialin@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the DT bindings for the SAW regulators. The saw-leader is the only property that is configurable in DT. The saw-slave property allows ganging (grouping) of several regulators so that their outputs can be combined. Signed-off-by: Ilia Lin Reviewed-by: Rob Herring --- .../bindings/regulator/qcom,spmi-regulator.txt | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt index 57d2c65..406f2e5 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt @@ -110,6 +110,11 @@ Qualcomm SPMI Regulators Definition: Reference to regulator supplying the input pin, as described in the data sheet. +- qcom,saw-reg: + Usage: optional + Value type: + Description: Reference to syscon node defining the SAW registers. + The regulator node houses sub-nodes for each regulator within the device. Each sub-node is identified using the node's name, with valid values listed for each @@ -201,6 +206,17 @@ see regulator.txt - with additional custom properties described below: 2 = 0.55 uA 3 = 0.75 uA +- qcom,saw-slave: + Usage: optional + Value type: + Description: SAW controlled gang slave. Will not be configured. + +- qcom,saw-leader: + Usage: optional + Value type: + Description: SAW controlled gang leader. Will be configured as + SAW regulator. + Example: regulators { @@ -221,3 +237,32 @@ Example: .... }; + +Example 2: + + saw3: syscon@9A10000 { + compatible = "syscon"; + reg = <0x9A10000 0x1000>; + }; + + ... + + spm-regulators { + compatible = "qcom,pm8994-regulators"; + qcom,saw-reg = <&saw3>; + s8 { + qcom,saw-slave; + }; + s9 { + qcom,saw-slave; + }; + s10 { + qcom,saw-slave; + }; + pm8994_s11_saw: s11 { + qcom,saw-leader; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1140000>; + }; + };