From patchwork Mon May 21 11:25:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilia Lin X-Patchwork-Id: 10414829 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 49B3C600CC for ; Mon, 21 May 2018 11:29:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3B32528816 for ; Mon, 21 May 2018 11:29:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2FB8D2882B; Mon, 21 May 2018 11:29:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B74B628816 for ; Mon, 21 May 2018 11:29:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752917AbeEUL0V (ORCPT ); Mon, 21 May 2018 07:26:21 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38226 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752885AbeEUL0R (ORCPT ); Mon, 21 May 2018 07:26:17 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 891D960D81; Mon, 21 May 2018 11:26:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526901976; bh=/r1w+Yc0St1u/INnDlvOev0yNepaMGc+87aSg5DVMDo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ag1A/kfD0Yp8kbsTlsus4zEyYwJz6KozI3FDLhIfHd3dhSrr1KZNcJrMyCyI6UyeT NKxIsXjulx2injhAmvB4V6zSLdsDVwXzfX1gYNEWJJLHhSUea+qWoF+Dc57SV1nmRT 7VfNXW2csVZBv/hqwoej6YtoSdhwCEJhG+EKvKBA= Received: from lx-ilial.mea.qualcomm.com (unknown [185.23.60.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilialin@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 303006081C; Mon, 21 May 2018 11:26:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526901975; bh=/r1w+Yc0St1u/INnDlvOev0yNepaMGc+87aSg5DVMDo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D0W9CO1fNHLNieg6+UYCXgU62qi75fqQiFiwv5XqFxKAff7W1I+w8BBODAaFtNaQO PsllYWzvRfu3Ivy8bCFDx0P/Q/AtegCgfTviZqgjg7NIu+gd2CHz4zws7KV8RX8LHG LK1Atu/XktKn3O17BcLeFIQVkDN7dMJ33v/jNAgA= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 303006081C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilialin@codeaurora.org From: Ilia Lin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, mark.rutland@arm.com, viresh.kumar@linaro.org, nm@ti.com, lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org, david.brown@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, rjw@rjwysocki.net, linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rnayak@codeaurora.org, ilialin@codeaurora.org, amit.kucheria@linaro.org, nicolas.dechesne@linaro.org, celster@codeaurora.org, tfinkel@codeaurora.org Subject: [PATCH v9 06/15] clk: qcom: cpu-8996: Add support to switch to alternate PLL Date: Mon, 21 May 2018 14:25:23 +0300 Message-Id: <1526901932-9514-7-git-send-email-ilialin@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526901932-9514-1-git-send-email-ilialin@codeaurora.org> References: <1526901932-9514-1-git-send-email-ilialin@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rajendra Nayak Each of the CPU clusters on msm8996 are powered via a primary PLL and a secondary PLL. The primary PLL is what drives the CPU clk, except for times when we are reprogramming the PLL itself, when we temporarily switch to an alternate PLL. Use clock rate change notifiers to support this. Signed-off-by: Rajendra Nayak Signed-off-by: Ilia Lin --- drivers/clk/qcom/clk-cpu-8996.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c index d92cad93..620fdc2 100644 --- a/drivers/clk/qcom/clk-cpu-8996.c +++ b/drivers/clk/qcom/clk-cpu-8996.c @@ -52,6 +52,7 @@ * detect voltage droops. */ +#include #include #include #include @@ -178,10 +179,14 @@ struct clk_cpu_8996_mux { u32 reg; u8 shift; u8 width; + struct notifier_block nb; struct clk_hw *pll; struct clk_regmap clkr; }; +#define to_clk_cpu_8996_mux_nb(_nb) \ + container_of(_nb, struct clk_cpu_8996_mux, nb) + static inline struct clk_cpu_8996_mux *to_clk_cpu_8996_mux_hw(struct clk_hw *hw) { @@ -227,6 +232,26 @@ static int clk_cpu_8996_mux_set_parent(struct clk_hw *hw, u8 index) return 0; } +int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event, + void *data) +{ + int ret; + struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_nb(nb); + + switch (event) { + case PRE_RATE_CHANGE: + ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, ALT_INDEX); + break; + case POST_RATE_CHANGE: + ret = clk_cpu_8996_mux_set_parent(&cpuclk->clkr.hw, PLL_INDEX); + break; + default: + ret = 0; + break; + } + + return notifier_from_errno(ret); +}; const struct clk_ops clk_cpu_8996_mux_ops = { .set_parent = clk_cpu_8996_mux_set_parent, .get_parent = clk_cpu_8996_mux_get_parent, @@ -270,6 +295,7 @@ static int clk_cpu_8996_mux_set_parent(struct clk_hw *hw, u8 index) .shift = 0, .width = 2, .pll = &pwrcl_pll.clkr.hw, + .nb.notifier_call = cpu_clk_notifier_cb, .clkr.hw.init = &(struct clk_init_data) { .name = "pwrcl_pmux", .parent_names = (const char *[]){ @@ -289,6 +315,7 @@ static int clk_cpu_8996_mux_set_parent(struct clk_hw *hw, u8 index) .shift = 0, .width = 2, .pll = &perfcl_pll.clkr.hw, + .nb.notifier_call = cpu_clk_notifier_cb, .clkr.hw.init = &(struct clk_init_data) { .name = "perfcl_pmux", .parent_names = (const char *[]){ @@ -347,6 +374,12 @@ struct clk_regmap *clks[] = { clk_alpha_pll_configure(&perfcl_alt_pll, regmap, &altpll_config); clk_alpha_pll_configure(&pwrcl_alt_pll, regmap, &altpll_config); + ret = clk_notifier_register(pwrcl_pmux.clkr.hw.clk, &pwrcl_pmux.nb); + if (ret) + return ret; + + ret = clk_notifier_register(perfcl_pmux.clkr.hw.clk, &perfcl_pmux.nb); + return ret; }