From patchwork Thu May 24 00:35:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rishabh Bhatnagar X-Patchwork-Id: 10422539 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CBE1B6016C for ; Thu, 24 May 2018 00:36:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C423729229 for ; Thu, 24 May 2018 00:36:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B902C292E3; Thu, 24 May 2018 00:36:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DE8A29229 for ; Thu, 24 May 2018 00:36:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754902AbeEXAfc (ORCPT ); Wed, 23 May 2018 20:35:32 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:34828 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754877AbeEXAf3 (ORCPT ); Wed, 23 May 2018 20:35:29 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0C6A5609D1; Thu, 24 May 2018 00:35:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527122129; bh=t1bRtXvD13lC0+OJSoLKJXeWP9+zoklEnVW5Q3Mxf/k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QZZtTjwO2UPuiNnx5uJOTdu9Ka/aBtF4pbE0dwfGSrQ9BXE7o54dpVI09u1y8JCQt FS/mhQrrFp7BQdB3O4fFwnfp+JnI/fyyQ/+uzzM3UmEQBFp8CmJUp2YtjuYcifR6mS Xat3KCSbryQ1rUa+HaOZ1+jKSV0fbv+yCHl/6UqA= Received: from rishabhb-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rishabhb@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 03C6C609D1; Thu, 24 May 2018 00:35:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527122128; bh=t1bRtXvD13lC0+OJSoLKJXeWP9+zoklEnVW5Q3Mxf/k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pMDMH4Qzq8Q9jAx2SBzL0IQLYROmPjqcgPIqtFMojDNNhcUDTCVfJphWwPtcVLcFm M8nKDMX8OlzOa7FYQKqjDSXPohguGW9Gnw8k9hoRqB9SDnxjeBCb/QyjjaoqX8LKia U5U0qsFDe2Qf54bUQXmDIYpNcsXh+KfEA0SHYPA0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 03C6C609D1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rishabhb@codeaurora.org From: Rishabh Bhatnagar To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm@lists.infradead.org, tsoni@codeaurora.org, ckadabi@codeaurora.org, evgreen@chromium.org, robh@kernel.org, andy.shevchenko@gmail.com, Rishabh Bhatnagar Subject: [PATCH v8 1/2] dt-bindings: Documentation for qcom, llcc Date: Wed, 23 May 2018 17:35:20 -0700 Message-Id: <1527122121-31452-2-git-send-email-rishabhb@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527122121-31452-1-git-send-email-rishabhb@codeaurora.org> References: <1527122121-31452-1-git-send-email-rishabhb@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Documentation for last level cache controller device tree bindings, client bindings usage examples. Signed-off-by: Channagoud Kadabi Signed-off-by: Rishabh Bhatnagar Reviewed-by: Evan Green Reviewed-by: Rob Herring Reviewed-by: Bjorn Andersson --- .../devicetree/bindings/arm/msm/qcom,llcc.txt | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt new file mode 100644 index 0000000..5e85749 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt @@ -0,0 +1,26 @@ +== Introduction== + +LLCC (Last Level Cache Controller) provides last level of cache memory in SOC, +that can be shared by multiple clients. Clients here are different cores in the +SOC, the idea is to minimize the local caches at the clients and migrate to +common pool of memory. Cache memory is divided into partitions called slices +which are assigned to clients. Clients can query the slice details, activate +and deactivate them. + +Properties: +- compatible: + Usage: required + Value type: + Definition: must be "qcom,sdm845-llcc" + +- reg: + Usage: required + Value Type: + Definition: Start address and the the size of the register region. + +Example: + + cache-controller@1100000 { + compatible = "qcom,sdm845-llcc"; + reg = <0x1100000 0x250000>; + };