From patchwork Fri May 25 12:21:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 10427231 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AEE31602D8 for ; Fri, 25 May 2018 12:23:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 925C3292F9 for ; Fri, 25 May 2018 12:23:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 86F452930E; Fri, 25 May 2018 12:23:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BA8FA292F9 for ; Fri, 25 May 2018 12:23:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966807AbeEYMXo (ORCPT ); Fri, 25 May 2018 08:23:44 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:49508 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S967079AbeEYMW6 (ORCPT ); Fri, 25 May 2018 08:22:58 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 875B460C4F; Fri, 25 May 2018 12:22:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527250977; bh=OYWWFk5xQt8u9AhqXdFspK7oYoM62IPypYTImaqHyM0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AEK2UUkNFqXo/QozTvrQj685LIffC+b44Sn61ewYAK4Ygk2AazWI5FS/nRpEVpdF4 nrFusFGUzsewvK/MynlU1sb5ev0VDY3JExPG8B/KTqogEDw3oluokbksCYc8J5C0yz K5UTauEUDn1Vi7FlIVfxW+vKzLtvGSOptC5NipU8= Received: from absahu-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: absahu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 599AF60F74; Fri, 25 May 2018 12:22:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527250976; bh=OYWWFk5xQt8u9AhqXdFspK7oYoM62IPypYTImaqHyM0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dAC/HXUChlxXgykC/0Lsc1hy5gl7UjMyTxnybXzcGDs4kBP1r9DiJasHNVDv0aDFE oqXLtnKg7UiZqMUaBoqKtnEEEC/Q88iRTmofnLaU5A1BqWq4d02hlDwKjyIyZhCBtP n0lvN4p4SgtJr5VCMOJ749imreux3UwXok2fF9Rg= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 599AF60F74 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=absahu@codeaurora.org From: Abhishek Sahu To: Boris Brezillon Cc: David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Cyrille Pitchen , Miquel Raynal , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Andy Gross , Archit Taneja , Abhishek Sahu Subject: [PATCH v3 13/16] mtd: rawnand: qcom: minor code reorganization for bad block check Date: Fri, 25 May 2018 17:51:41 +0530 Message-Id: <1527250904-21988-14-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527250904-21988-1-git-send-email-absahu@codeaurora.org> References: <1527250904-21988-1-git-send-email-absahu@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The QCOM NAND controller layout is such that, the bad block byte offset for last codeword will come to first byte in spare area. Currently, the raw read for last codeword is being done with copy_last_cw function. It does following 2 things: 1. Read the last codeword bytes from NAND chip to NAND controller internal HW buffer. 2. Copy all these bytes from HW buffer to actual buffer. For bad block check, maximum two bytes are required so instead of copying the complete bytes in step 2, only those bbm_size bytes can be copied. This patch does minor code reorganization for the same. After this, copy_last_cw function won’t be required. Signed-off-by: Abhishek Sahu --- * Changes from v2: 1. Changed commit message and comments slightly * Changes from v1: NEW CHANGE drivers/mtd/nand/raw/qcom_nandc.c | 66 +++++++++++++++------------------------ 1 file changed, 25 insertions(+), 41 deletions(-) diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c index d693b5f..f72bc8a 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -1769,41 +1769,6 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf, return parse_read_errors(host, data_buf_start, oob_buf_start); } -/* - * a helper that copies the last step/codeword of a page (containing free oob) - * into our local buffer - */ -static int copy_last_cw(struct qcom_nand_host *host, int page) -{ - struct nand_chip *chip = &host->chip; - struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); - struct nand_ecc_ctrl *ecc = &chip->ecc; - int size; - int ret; - - clear_read_regs(nandc); - - size = host->use_ecc ? host->cw_data : host->cw_size; - - /* prepare a clean read buffer */ - memset(nandc->data_buffer, 0xff, size); - - set_address(host, host->cw_size * (ecc->steps - 1), page); - update_rw_regs(host, 1, true); - - config_nand_single_cw_page_read(nandc); - - read_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, size, 0); - - ret = submit_descs(nandc); - if (ret) - dev_err(nandc->dev, "failed to copy last codeword\n"); - - free_descs(nandc); - - return ret; -} - /* implements ecc->read_page() */ static int qcom_nandc_read_page(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, int oob_required, int page) @@ -2118,6 +2083,7 @@ static int qcom_nandc_block_bad(struct mtd_info *mtd, loff_t ofs) struct nand_ecc_ctrl *ecc = &chip->ecc; int page, ret, bbpos, bad = 0; u32 flash_status; + u8 *bbm_bytes_buf = chip->data_buf; page = (int)(ofs >> chip->page_shift) & chip->pagemask; @@ -2128,11 +2094,31 @@ static int qcom_nandc_block_bad(struct mtd_info *mtd, loff_t ofs) * that contains the BBM */ host->use_ecc = false; + bbpos = mtd->writesize - host->cw_size * (ecc->steps - 1); clear_bam_transaction(nandc); - ret = copy_last_cw(host, page); - if (ret) + clear_read_regs(nandc); + + set_address(host, host->cw_size * (ecc->steps - 1), page); + update_rw_regs(host, 1, true); + + /* + * The last codeword data will be copied from NAND device to NAND + * controller internal HW buffer. Copy only required BBM size bytes + * from this HW buffer to bbm_bytes_buf which is present at + * bbpos offset. + */ + nandc_set_read_loc(nandc, 0, bbpos, host->bbm_size, 1); + config_nand_single_cw_page_read(nandc); + read_data_dma(nandc, FLASH_BUF_ACC + bbpos, bbm_bytes_buf, + host->bbm_size, 0); + + ret = submit_descs(nandc); + free_descs(nandc); + if (ret) { + dev_err(nandc->dev, "failed to copy bad block bytes\n"); goto err; + } flash_status = le32_to_cpu(nandc->reg_read_buf[0]); @@ -2141,12 +2127,10 @@ static int qcom_nandc_block_bad(struct mtd_info *mtd, loff_t ofs) goto err; } - bbpos = mtd->writesize - host->cw_size * (ecc->steps - 1); - - bad = nandc->data_buffer[bbpos] != 0xff; + bad = bbm_bytes_buf[0] != 0xff; if (chip->options & NAND_BUSWIDTH_16) - bad = bad || (nandc->data_buffer[bbpos + 1] != 0xff); + bad = bad || (bbm_bytes_buf[1] != 0xff); err: return bad; }