From patchwork Wed Jun 20 07:27:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 10476489 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DEE01600F6 for ; Wed, 20 Jun 2018 08:45:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF2A228D08 for ; Wed, 20 Jun 2018 08:45:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C34DA28D1F; Wed, 20 Jun 2018 08:45:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5F62B28D08 for ; Wed, 20 Jun 2018 08:45:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932978AbeFTIpM (ORCPT ); Wed, 20 Jun 2018 04:45:12 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:49642 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932960AbeFTIpF (ORCPT ); Wed, 20 Jun 2018 04:45:05 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A809360B11; Wed, 20 Jun 2018 07:28:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1529479689; bh=65wAojS4gA+9CrJw99QgkrL4ZkxgQFvd9rJZw+YoL5o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q//zNFI4tHKdsXAxOipfMYBsbnejabtwXj3HzU2af/BbiQkDetiXwkp6DHUiDD8Pw QX8UnEPgPoIaFqIGGCjx1OA49qKAdSDV1h0OLH3NXV71EfMFg9C9BTcjThVlk9VgxX slg5AIPNxnK7UF0/7JHhXeYay4PQmHTDh1zwMM88= Received: from absahu-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: absahu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 05A51605FF; Wed, 20 Jun 2018 07:28:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1529479689; bh=65wAojS4gA+9CrJw99QgkrL4ZkxgQFvd9rJZw+YoL5o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q//zNFI4tHKdsXAxOipfMYBsbnejabtwXj3HzU2af/BbiQkDetiXwkp6DHUiDD8Pw QX8UnEPgPoIaFqIGGCjx1OA49qKAdSDV1h0OLH3NXV71EfMFg9C9BTcjThVlk9VgxX slg5AIPNxnK7UF0/7JHhXeYay4PQmHTDh1zwMM88= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 05A51605FF Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=absahu@codeaurora.org From: Abhishek Sahu To: Boris Brezillon , Miquel Raynal Cc: David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Andy Gross , Archit Taneja , Abhishek Sahu Subject: [PATCH v4 04/15] mtd: rawnand: qcom: remove dt property nand-ecc-step-size Date: Wed, 20 Jun 2018 12:57:31 +0530 Message-Id: <1529479662-4026-5-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1529479662-4026-1-git-send-email-absahu@codeaurora.org> References: <1529479662-4026-1-git-send-email-absahu@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP QCOM NAND controller supports only one step size (512) so nand-ecc-step-size DT property is redundant. This property can be removed and ecc step size can be assigned with 512 value. Acked-by: Miquel Raynal Signed-off-by: Abhishek Sahu --- * Changes from v3: 1. Minor change in comment (s/512 bytes of data in each step/512 bytes data steps) * Changes from v2: NEW CHANGE 1. Removed the custom logic and used the helper fuction. drivers/mtd/nand/raw/qcom_nandc.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c index 6a5519f..bf80a61 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -2325,15 +2325,8 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host) bool wide_bus; int ecc_mode = 1; - /* - * the controller requires each step consists of 512 bytes of data. - * bail out if DT has populated a wrong step size. - */ - if (ecc->size != NANDC_STEP_SIZE) { - dev_err(nandc->dev, "invalid ecc size\n"); - return -EINVAL; - } - + /* controller only supports 512 bytes data steps */ + ecc->size = NANDC_STEP_SIZE; wide_bus = chip->options & NAND_BUSWIDTH_16 ? true : false; if (ecc->strength >= 8) {