From patchwork Thu Nov 1 00:19:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeykumar Sankaran X-Patchwork-Id: 10663413 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8D32E3CF1 for ; Thu, 1 Nov 2018 00:19:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7896A2BB83 for ; Thu, 1 Nov 2018 00:19:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6BA822BB87; Thu, 1 Nov 2018 00:19:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D8FB72BB83 for ; Thu, 1 Nov 2018 00:19:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726234AbeKAJTn (ORCPT ); Thu, 1 Nov 2018 05:19:43 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:56900 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725931AbeKAJTn (ORCPT ); Thu, 1 Nov 2018 05:19:43 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 5E7FC60591; Thu, 1 Nov 2018 00:19:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1541031550; bh=gKb2MTGXMCQgKBFYZZ2Fl+pfNJ5OvwRLbu3lFWV19DU=; h=From:To:Cc:Subject:Date:From; b=iNntzkU67QfOIjHEC2Spnz8nariVsnPyBLfXxQF7KEiz0gyzIdkkCMPuJvAKz8OCJ /zlnyQEEP6HRDXhkkMSx7AwoNDYzG9ohpSsNHhAe7U9U9g06yGcnUaowz/L3tEQl15 jSfw27gFJk1I9CHrEpX0XUO9fBAP71mNVzeXPIXM= Received: from jeykumar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jsanka@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 14FC260591; Thu, 1 Nov 2018 00:19:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1541031549; bh=gKb2MTGXMCQgKBFYZZ2Fl+pfNJ5OvwRLbu3lFWV19DU=; h=From:To:Cc:Subject:Date:From; b=SiYAWcMbns4BQsH9q1EfdizBRxHCPiNha6G8kTxcRTgEJsdrh7YHwEchKZElvL5gu 5CzviqKKN4hjBqPHgcN3LJSZZ06YCRblEZqKTAzFB+a8KaYI8Q+PiVLh+uLl5EXKsI zTydLe9vfqGctKKiaA+LxRfGU353fjfOXPUZe2bQ= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 14FC260591 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jsanka@codeaurora.org From: Jeykumar Sankaran To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Cc: Jeykumar Sankaran , seanpaul@chromium.org, robdclark@gmail.com, hoegsberg@google.com Subject: [PATCH 1/2] drm/msm: use common display thread for dispatching vblank events Date: Wed, 31 Oct 2018 17:19:04 -0700 Message-Id: <1541031545-20520-1-git-send-email-jsanka@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP DPU was using one thread per display to dispatch async commits and vblank requests. Since clean up already happened in msm to use the common thread for all the display commits, display threads are only used to cater vblank requests. Single thread is sufficient to do the job without any performance hits. Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +--- drivers/gpu/drm/msm/msm_drv.c | 50 ++++++++++++----------------- drivers/gpu/drm/msm/msm_drv.h | 2 +- 3 files changed, 23 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 82c55ef..aff20f5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -753,11 +753,7 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, is_vid_mode = dpu_enc->disp_info.capabilities & MSM_DISPLAY_CAP_VID_MODE; - if (drm_enc->crtc->index >= ARRAY_SIZE(priv->disp_thread)) { - DPU_ERROR("invalid crtc index\n"); - return -EINVAL; - } - disp_thread = &priv->disp_thread[drm_enc->crtc->index]; + disp_thread = &priv->disp_thread; /* * when idle_pc is not supported, process only KICKOFF, STOP and MODESET diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 9c9f7ff..1f384b3 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -257,8 +257,7 @@ static int vblank_ctrl_queue_work(struct msm_drm_private *priv, list_add_tail(&vbl_ev->node, &vbl_ctrl->event_list); spin_unlock_irqrestore(&vbl_ctrl->lock, flags); - kthread_queue_work(&priv->disp_thread[crtc_id].worker, - &vbl_ctrl->work); + kthread_queue_work(&priv->disp_thread.worker, &vbl_ctrl->work); return 0; } @@ -284,14 +283,12 @@ static int msm_drm_uninit(struct device *dev) kfree(vbl_ev); } + kthread_flush_worker(&priv->disp_thread.worker); + kthread_stop(priv->disp_thread.thread); + priv->disp_thread.thread = NULL; + /* clean up display commit/event worker threads */ for (i = 0; i < priv->num_crtcs; i++) { - if (priv->disp_thread[i].thread) { - kthread_flush_worker(&priv->disp_thread[i].worker); - kthread_stop(priv->disp_thread[i].thread); - priv->disp_thread[i].thread = NULL; - } - if (priv->event_thread[i].thread) { kthread_flush_worker(&priv->event_thread[i].worker); kthread_stop(priv->event_thread[i].thread); @@ -537,6 +534,22 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) ddev->mode_config.funcs = &mode_config_funcs; ddev->mode_config.helper_private = &mode_config_helper_funcs; + /* initialize display thread */ + kthread_init_worker(&priv->disp_thread.worker); + priv->disp_thread.dev = ddev; + priv->disp_thread.thread = kthread_run(kthread_worker_fn, + &priv->disp_thread.worker, + "disp_thread"); + if (IS_ERR(priv->disp_thread.thread)) { + DRM_DEV_ERROR(dev, "failed to create crtc_commit kthread\n"); + priv->disp_thread.thread = NULL; + goto err_msm_uninit; + } + + ret = sched_setscheduler(priv->disp_thread.thread, SCHED_FIFO, ¶m); + if (ret) + pr_warn("display thread priority update failed: %d\n", ret); + /** * this priority was found during empiric testing to have appropriate * realtime scheduling to process display updates and interact with @@ -544,27 +557,6 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) */ param.sched_priority = 16; for (i = 0; i < priv->num_crtcs; i++) { - - /* initialize display thread */ - priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id; - kthread_init_worker(&priv->disp_thread[i].worker); - priv->disp_thread[i].dev = ddev; - priv->disp_thread[i].thread = - kthread_run(kthread_worker_fn, - &priv->disp_thread[i].worker, - "crtc_commit:%d", priv->disp_thread[i].crtc_id); - if (IS_ERR(priv->disp_thread[i].thread)) { - DRM_DEV_ERROR(dev, "failed to create crtc_commit kthread\n"); - priv->disp_thread[i].thread = NULL; - goto err_msm_uninit; - } - - ret = sched_setscheduler(priv->disp_thread[i].thread, - SCHED_FIFO, ¶m); - if (ret) - dev_warn(dev, "disp_thread set priority failed: %d\n", - ret); - /* initialize event thread */ priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id; kthread_init_worker(&priv->event_thread[i].worker); diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 9d11f32..e81b1fa 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -197,7 +197,7 @@ struct msm_drm_private { unsigned int num_crtcs; struct drm_crtc *crtcs[MAX_CRTCS]; - struct msm_drm_thread disp_thread[MAX_CRTCS]; + struct msm_drm_thread disp_thread; struct msm_drm_thread event_thread[MAX_CRTCS]; unsigned int num_encoders;